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git01.mediatek.com / filogic / uboot / 3b829a2c0bac0f9767988942751eaac8e3ade5e0 / . / dts / upstream / src / arm64 / rockchip / rk3368-evb.dtsi
blob: b48b98c13705c385ccceb1c66066eb24be854636 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2015 Caesar Wang <wxt@rock-chips.com>
4 */
5
6#include <dt-bindings/input/input.h>
7#include <dt-bindings/pwm/pwm.h>
8#include "rk3368.dtsi"
9
10/ {
11 aliases {
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]12 ethernet0 = &gmac;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]13 mmc0 = &emmc;
14 };
15
16 chosen {
17 stdout-path = "serial2:115200n8";
18 };
19
20 memory {
21 device_type = "memory";
22 reg = <0x0 0x0 0x0 0x40000000>;
23 };
24
25 backlight: backlight {
26 compatible = "pwm-backlight";
27 brightness-levels = <
28 0 1 2 3 4 5 6 7
29 8 9 10 11 12 13 14 15
30 16 17 18 19 20 21 22 23
31 24 25 26 27 28 29 30 31
32 32 33 34 35 36 37 38 39
33 40 41 42 43 44 45 46 47
34 48 49 50 51 52 53 54 55
35 56 57 58 59 60 61 62 63
36 64 65 66 67 68 69 70 71
37 72 73 74 75 76 77 78 79
38 80 81 82 83 84 85 86 87
39 88 89 90 91 92 93 94 95
40 96 97 98 99 100 101 102 103
41 104 105 106 107 108 109 110 111
42 112 113 114 115 116 117 118 119
43 120 121 122 123 124 125 126 127
44 128 129 130 131 132 133 134 135
45 136 137 138 139 140 141 142 143
46 144 145 146 147 148 149 150 151
47 152 153 154 155 156 157 158 159
48 160 161 162 163 164 165 166 167
49 168 169 170 171 172 173 174 175
50 176 177 178 179 180 181 182 183
51 184 185 186 187 188 189 190 191
52 192 193 194 195 196 197 198 199
53 200 201 202 203 204 205 206 207
54 208 209 210 211 212 213 214 215
55 216 217 218 219 220 221 222 223
56 224 225 226 227 228 229 230 231
57 232 233 234 235 236 237 238 239
58 240 241 242 243 244 245 246 247
59 248 249 250 251 252 253 254 255>;
60 default-brightness-level = <128>;
61 enable-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
62 pinctrl-names = "default";
63 pinctrl-0 = <&bl_en>;
64 pwms = <&pwm0 0 1000000 PWM_POLARITY_INVERTED>;
65 };
66
67 emmc_pwrseq: emmc-pwrseq {
68 compatible = "mmc-pwrseq-emmc";
69 pinctrl-0 = <&emmc_reset>;
70 pinctrl-names = "default";
71 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
72 };
73
74 keys: gpio-keys {
75 compatible = "gpio-keys";
76 pinctrl-names = "default";
77 pinctrl-0 = <&pwr_key>;
78
79 key-power {
80 wakeup-source;
81 gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
82 label = "GPIO Power";
83 linux,code = <KEY_POWER>;
84 };
85 };
86
87 /* supplies both host and otg */
88 vcc_host: vcc-host-regulator {
89 compatible = "regulator-fixed";
90 enable-active-high;
91 gpio = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
92 pinctrl-names = "default";
93 pinctrl-0 = <&host_vbus_drv>;
94 regulator-name = "vcc_host";
95 regulator-always-on;
96 regulator-boot-on;
97 vin-supply = <&vcc_sys>;
98 };
99
100 vcc_lan: vcc-lan-regulator {
101 compatible = "regulator-fixed";
102 regulator-name = "vcc_lan";
103 regulator-min-microvolt = <3300000>;
104 regulator-max-microvolt = <3300000>;
105 regulator-always-on;
106 regulator-boot-on;
107 vin-supply = <&vcc_io>;
108 };
109
110 vcc_sys: vcc-sys-regulator {
111 compatible = "regulator-fixed";
112 regulator-name = "vcc_sys";
113 regulator-min-microvolt = <5000000>;
114 regulator-max-microvolt = <5000000>;
115 regulator-always-on;
116 regulator-boot-on;
117 };
118};
119
120&emmc {
121 bus-width = <8>;
122 cap-mmc-highspeed;
123 mmc-pwrseq = <&emmc_pwrseq>;
124 non-removable;
125 pinctrl-names = "default";
126 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
127 status = "okay";
128};
129
130&gmac {
131 phy-supply = <&vcc_lan>;
132 phy-mode = "rmii";
133 clock_in_out = "output";
134 snps,reset-gpio = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>;
135 snps,reset-active-low;
136 snps,reset-delays-us = <0 10000 1000000>;
137 pinctrl-names = "default";
138 pinctrl-0 = <&rmii_pins>;
139 tx_delay = <0x30>;
140 rx_delay = <0x10>;
141 status = "okay";
142};
143
144&i2c0 {
145 status = "okay";
146};
147
148&pinctrl {
149 pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
150 bias-disable;
151 drive-strength = <8>;
152 };
153
154 pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
155 bias-pull-up;
156 drive-strength = <8>;
157 };
158
159 backlight {
160 bl_en: bl-en {
161 rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
162 };
163 };
164
165 emmc {
166 emmc_bus8: emmc-bus8 {
167 rockchip,pins = <1 RK_PC2 2 &pcfg_pull_up_drv_8ma>,
168 <1 RK_PC3 2 &pcfg_pull_up_drv_8ma>,
169 <1 RK_PC4 2 &pcfg_pull_up_drv_8ma>,
170 <1 RK_PC5 2 &pcfg_pull_up_drv_8ma>,
171 <1 RK_PC6 2 &pcfg_pull_up_drv_8ma>,
172 <1 RK_PC7 2 &pcfg_pull_up_drv_8ma>,
173 <1 RK_PD0 2 &pcfg_pull_up_drv_8ma>,
174 <1 RK_PD1 2 &pcfg_pull_up_drv_8ma>;
175 };
176
177 emmc-clk {
178 rockchip,pins = <2 RK_PA4 2 &pcfg_pull_none_drv_8ma>;
179 };
180
181 emmc-cmd {
182 rockchip,pins = <1 RK_PD2 2 &pcfg_pull_up_drv_8ma>;
183 };
184
185 emmc_reset: emmc-reset {
186 rockchip,pins = <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
187 };
188 };
189
190 keys {
191 pwr_key: pwr-key {
192 rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
193 };
194 };
195
196 pmic {
197 pmic_int: pmic-int {
198 rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
199 };
200 };
201
202 sdio {
203 wifi_reg_on: wifi-reg-on {
204 rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
205 };
206
207 bt_rst: bt-rst {
208 rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
209 };
210 };
211
212 usb {
213 host_vbus_drv: host-vbus-drv {
214 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
215 };
216 };
217};
218
219&pwm0 {
220 status = "okay";
221};
222
223&tsadc {
224 rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
225 rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
226 status = "okay";
227};
228
229&uart2 {
230 status = "okay";
231};
232
233&usb_host0_ehci {
234 status = "okay";
235};
236
237&usb_otg {
238 dr_mode = "host";
239 status = "okay";
240};
241
242&wdt {
243 status = "okay";
244};