Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | /* |
| 3 | * Copyright (C) 2018 SolidRun ltd. |
| 4 | * Based on Marvell MACCHIATOBin board |
| 5 | * |
| 6 | * Device Tree file for SolidRun's ClearFog GT 8K |
| 7 | */ |
| 8 | |
| 9 | #include "armada-8040.dtsi" |
| 10 | |
| 11 | #include <dt-bindings/input/input.h> |
| 12 | #include <dt-bindings/gpio/gpio.h> |
| 13 | |
| 14 | / { |
| 15 | model = "SolidRun ClearFog GT 8K"; |
| 16 | compatible = "solidrun,clearfog-gt-8k", "marvell,armada8040", |
| 17 | "marvell,armada-ap806-quad", "marvell,armada-ap806"; |
| 18 | |
| 19 | chosen { |
| 20 | stdout-path = "serial0:115200n8"; |
| 21 | }; |
| 22 | |
| 23 | memory@0 { |
| 24 | device_type = "memory"; |
| 25 | reg = <0x0 0x0 0x0 0x80000000>; |
| 26 | }; |
| 27 | |
| 28 | aliases { |
| 29 | ethernet0 = &cp1_eth1; |
| 30 | ethernet1 = &cp0_eth0; |
| 31 | ethernet2 = &cp1_eth2; |
| 32 | }; |
| 33 | |
| 34 | fan: pwm { |
| 35 | compatible = "pwm-fan"; |
| 36 | /* 20% steps */ |
| 37 | cooling-levels = <0 51 102 153 204 255>; |
| 38 | #cooling-cells = <2>; |
| 39 | pinctrl-names = "default"; |
| 40 | pinctrl-0 = <&cp0_fan_pwm_pins>; |
| 41 | pwms = <&cp0_gpio2 16 40000>; |
| 42 | }; |
| 43 | |
| 44 | v_3_3: regulator-3-3v { |
| 45 | compatible = "regulator-fixed"; |
| 46 | regulator-name = "v_3_3"; |
| 47 | regulator-min-microvolt = <3300000>; |
| 48 | regulator-max-microvolt = <3300000>; |
| 49 | regulator-always-on; |
| 50 | status = "okay"; |
| 51 | }; |
| 52 | |
| 53 | v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 { |
| 54 | compatible = "regulator-fixed"; |
| 55 | gpio = <&cp0_gpio2 15 GPIO_ACTIVE_LOW>; |
| 56 | pinctrl-names = "default"; |
| 57 | pinctrl-0 = <&cp0_xhci_vbus_pins>; |
| 58 | regulator-name = "v_5v0_usb3_hst_vbus"; |
| 59 | regulator-min-microvolt = <5000000>; |
| 60 | regulator-max-microvolt = <5000000>; |
| 61 | status = "okay"; |
| 62 | }; |
| 63 | |
| 64 | sfp_cp0_eth0: sfp-cp0-eth0 { |
| 65 | compatible = "sff,sfp"; |
| 66 | i2c-bus = <&cp0_i2c1>; |
| 67 | mod-def0-gpios = <&cp0_gpio2 17 GPIO_ACTIVE_LOW>; |
| 68 | tx-disable-gpios = <&cp1_gpio1 29 GPIO_ACTIVE_HIGH>; |
| 69 | pinctrl-names = "default"; |
| 70 | pinctrl-0 = <&cp0_sfp_present_pins &cp1_sfp_tx_disable_pins>; |
| 71 | maximum-power-milliwatt = <2000>; |
| 72 | }; |
| 73 | |
| 74 | leds { |
| 75 | compatible = "gpio-leds"; |
| 76 | pinctrl-0 = <&cp0_led0_pins |
| 77 | &cp0_led1_pins>; |
| 78 | pinctrl-names = "default"; |
| 79 | /* No designated function for these LEDs at the moment */ |
| 80 | led0 { |
| 81 | label = "clearfog-gt-8k:green:led0"; |
| 82 | gpios = <&cp0_gpio2 8 GPIO_ACTIVE_LOW>; |
| 83 | default-state = "on"; |
| 84 | }; |
| 85 | led1 { |
| 86 | label = "clearfog-gt-8k:green:led1"; |
| 87 | gpios = <&cp0_gpio2 9 GPIO_ACTIVE_LOW>; |
| 88 | default-state = "on"; |
| 89 | }; |
| 90 | }; |
| 91 | |
| 92 | keys { |
| 93 | compatible = "gpio-keys"; |
| 94 | pinctrl-0 = <&cp0_gpio_reset_pins &cp1_wps_button_pins>; |
| 95 | pinctrl-names = "default"; |
| 96 | |
| 97 | button-0 { |
| 98 | /* The rear button */ |
| 99 | label = "Rear Button"; |
| 100 | gpios = <&cp0_gpio2 7 GPIO_ACTIVE_LOW>; |
| 101 | linux,can-disable; |
| 102 | linux,code = <BTN_0>; |
| 103 | }; |
| 104 | |
| 105 | button-1 { |
| 106 | /* The wps button */ |
| 107 | label = "WPS Button"; |
| 108 | gpios = <&cp1_gpio1 30 GPIO_ACTIVE_LOW>; |
| 109 | linux,can-disable; |
| 110 | linux,code = <KEY_WPS_BUTTON>; |
| 111 | }; |
| 112 | }; |
| 113 | }; |
| 114 | |
| 115 | &ap_thermal_ic { |
| 116 | polling-delay = <1000>; /* milliseconds */ |
| 117 | trips { |
| 118 | ap_active: trip-active { |
| 119 | temperature = <40000>; /* millicelsius */ |
| 120 | hysteresis = <4000>; /* millicelsius */ |
| 121 | type = "active"; |
| 122 | }; |
| 123 | }; |
| 124 | cooling-maps { |
| 125 | map0 { |
| 126 | trip = <&ap_active>; |
| 127 | cooling-device = <&fan THERMAL_NO_LIMIT 4>; |
| 128 | }; |
| 129 | map1 { |
| 130 | trip = <&ap_crit>; |
| 131 | cooling-device = <&fan 4 5>; |
| 132 | }; |
| 133 | }; |
| 134 | }; |
| 135 | |
| 136 | &cp0_thermal_ic { |
| 137 | polling-delay = <1000>; /* milliseconds */ |
| 138 | trips { |
| 139 | cp0_active0: trip-active0 { |
| 140 | temperature = <40000>; /* millicelsius */ |
| 141 | hysteresis = <2500>; /* millicelsius */ |
| 142 | type = "active"; |
| 143 | }; |
| 144 | cp0_active1: trip-active1 { |
| 145 | temperature = <45000>; /* millicelsius */ |
| 146 | hysteresis = <2500>; /* millicelsius */ |
| 147 | type = "active"; |
| 148 | }; |
| 149 | cp0_active2: trip-active2 { |
| 150 | temperature = <50000>; /* millicelsius */ |
| 151 | hysteresis = <2500>; /* millicelsius */ |
| 152 | type = "active"; |
| 153 | }; |
| 154 | cp0_active3: trip-active3 { |
| 155 | temperature = <60000>; /* millicelsius */ |
| 156 | hysteresis = <2500>; /* millicelsius */ |
| 157 | type = "active"; |
| 158 | }; |
| 159 | }; |
| 160 | cooling-maps { |
| 161 | map0 { |
| 162 | trip = <&cp0_active0>; |
| 163 | cooling-device = <&fan 0 1>; |
| 164 | }; |
| 165 | map1 { |
| 166 | trip = <&cp0_active1>; |
| 167 | cooling-device = <&fan 1 2>; |
| 168 | }; |
| 169 | map2 { |
| 170 | trip = <&cp0_active2>; |
| 171 | cooling-device = <&fan 2 3>; |
| 172 | }; |
| 173 | map3 { |
| 174 | trip = <&cp0_active3>; |
| 175 | cooling-device = <&fan 3 4>; |
| 176 | }; |
| 177 | map4 { |
| 178 | trip = <&cp0_crit>; |
| 179 | cooling-device = <&fan 4 5>; |
| 180 | }; |
| 181 | }; |
| 182 | }; |
| 183 | |
| 184 | &cp1_thermal_ic { |
| 185 | polling-delay = <1000>; /* milliseconds */ |
| 186 | trips { |
| 187 | cp1_active0: trip-active0 { |
| 188 | temperature = <40000>; /* millicelsius */ |
| 189 | hysteresis = <2500>; /* millicelsius */ |
| 190 | type = "active"; |
| 191 | }; |
| 192 | cp1_active1: trip-active1 { |
| 193 | temperature = <45000>; /* millicelsius */ |
| 194 | hysteresis = <2500>; /* millicelsius */ |
| 195 | type = "active"; |
| 196 | }; |
| 197 | cp1_active2: trip-active2 { |
| 198 | temperature = <50000>; /* millicelsius */ |
| 199 | hysteresis = <2500>; /* millicelsius */ |
| 200 | type = "active"; |
| 201 | }; |
| 202 | cp1_active3: trip-active3 { |
| 203 | temperature = <60000>; /* millicelsius */ |
| 204 | hysteresis = <2500>; /* millicelsius */ |
| 205 | type = "active"; |
| 206 | }; |
| 207 | }; |
| 208 | cooling-maps { |
| 209 | map0 { |
| 210 | trip = <&cp1_active0>; |
| 211 | cooling-device = <&fan 0 1>; |
| 212 | }; |
| 213 | map1 { |
| 214 | trip = <&cp1_active1>; |
| 215 | cooling-device = <&fan 1 2>; |
| 216 | }; |
| 217 | map2 { |
| 218 | trip = <&cp1_active2>; |
| 219 | cooling-device = <&fan 2 3>; |
| 220 | }; |
| 221 | map3 { |
| 222 | trip = <&cp1_active3>; |
| 223 | cooling-device = <&fan 3 4>; |
| 224 | }; |
| 225 | map4 { |
| 226 | trip = <&cp1_crit>; |
| 227 | cooling-device = <&fan 4 5>; |
| 228 | }; |
| 229 | }; |
| 230 | }; |
| 231 | |
| 232 | &uart0 { |
| 233 | status = "okay"; |
| 234 | pinctrl-0 = <&uart0_pins>; |
| 235 | pinctrl-names = "default"; |
| 236 | }; |
| 237 | |
| 238 | &ap_sdhci0 { |
| 239 | bus-width = <8>; |
| 240 | no-1-8-v; |
| 241 | no-sd; |
| 242 | no-sdio; |
| 243 | non-removable; |
| 244 | status = "okay"; |
| 245 | vqmmc-supply = <&v_3_3>; |
| 246 | }; |
| 247 | |
| 248 | &cp0_i2c0 { |
| 249 | clock-frequency = <100000>; |
| 250 | pinctrl-names = "default"; |
| 251 | pinctrl-0 = <&cp0_i2c0_pins>; |
| 252 | status = "okay"; |
| 253 | }; |
| 254 | |
| 255 | &cp0_i2c1 { |
| 256 | clock-frequency = <100000>; |
| 257 | pinctrl-names = "default"; |
| 258 | pinctrl-0 = <&cp0_i2c1_pins>; |
| 259 | status = "okay"; |
| 260 | }; |
| 261 | |
| 262 | &cp0_pinctrl { |
| 263 | /* |
| 264 | * MPP Bus: |
| 265 | * [0-31] = 0xff: Keep default CP0_shared_pins: |
| 266 | * [11] CLKOUT_MPP_11 (out) |
| 267 | * [23] LINK_RD_IN_CP2CP (in) |
| 268 | * [25] CLKOUT_MPP_25 (out) |
| 269 | * [29] AVS_FB_IN_CP2CP (in) |
| 270 | * [32, 33, 34] pci0/1/2 reset |
| 271 | * [35-38] CP0 I2C1 and I2C0 |
| 272 | * [39] GPIO reset button |
| 273 | * [40,41] LED0 and LED1 |
| 274 | * [43] 1512 phy reset |
| 275 | * [47] USB VBUS EN (active low) |
| 276 | * [48] FAN PWM |
| 277 | * [49] SFP+ present signal |
| 278 | * [50] TPM interrupt |
| 279 | * [51] WLAN0 disable |
| 280 | * [52] WLAN1 disable |
| 281 | * [53] LTE disable |
| 282 | * [54] NFC reset |
| 283 | * [55] Micro SD card detect |
| 284 | * [56-61] Micro SD |
| 285 | */ |
| 286 | |
| 287 | cp0_pci0_reset_pins: pci0-reset-pins { |
| 288 | marvell,pins = "mpp32"; |
| 289 | marvell,function = "gpio"; |
| 290 | }; |
| 291 | |
| 292 | cp0_pci1_reset_pins: pci1-reset-pins { |
| 293 | marvell,pins = "mpp33"; |
| 294 | marvell,function = "gpio"; |
| 295 | }; |
| 296 | |
| 297 | cp0_pci2_reset_pins: pci2-reset-pins { |
| 298 | marvell,pins = "mpp34"; |
| 299 | marvell,function = "gpio"; |
| 300 | }; |
| 301 | |
| 302 | cp0_i2c1_pins: i2c1-pins { |
| 303 | marvell,pins = "mpp35", "mpp36"; |
| 304 | marvell,function = "i2c1"; |
| 305 | }; |
| 306 | |
| 307 | cp0_i2c0_pins: i2c0-pins { |
| 308 | marvell,pins = "mpp37", "mpp38"; |
| 309 | marvell,function = "i2c0"; |
| 310 | }; |
| 311 | |
| 312 | cp0_gpio_reset_pins: gpio-reset-pins { |
| 313 | marvell,pins = "mpp39"; |
| 314 | marvell,function = "gpio"; |
| 315 | }; |
| 316 | |
| 317 | cp0_led0_pins: led0-pins { |
| 318 | marvell,pins = "mpp40"; |
| 319 | marvell,function = "gpio"; |
| 320 | }; |
| 321 | |
| 322 | cp0_led1_pins: led1-pins { |
| 323 | marvell,pins = "mpp41"; |
| 324 | marvell,function = "gpio"; |
| 325 | }; |
| 326 | |
| 327 | cp0_copper_eth_phy_reset: copper-eth-phy-reset { |
| 328 | marvell,pins = "mpp43"; |
| 329 | marvell,function = "gpio"; |
| 330 | }; |
| 331 | |
| 332 | cp0_xhci_vbus_pins: xhci0-vbus-pins { |
| 333 | marvell,pins = "mpp47"; |
| 334 | marvell,function = "gpio"; |
| 335 | }; |
| 336 | |
| 337 | cp0_fan_pwm_pins: fan-pwm-pins { |
| 338 | marvell,pins = "mpp48"; |
| 339 | marvell,function = "gpio"; |
| 340 | }; |
| 341 | |
| 342 | cp0_sfp_present_pins: sfp-present-pins { |
| 343 | marvell,pins = "mpp49"; |
| 344 | marvell,function = "gpio"; |
| 345 | }; |
| 346 | |
| 347 | cp0_tpm_irq_pins: tpm-irq-pins { |
| 348 | marvell,pins = "mpp50"; |
| 349 | marvell,function = "gpio"; |
| 350 | }; |
| 351 | |
| 352 | cp0_wlan_disable_pins: wlan-disable-pins { |
| 353 | marvell,pins = "mpp51"; |
| 354 | marvell,function = "gpio"; |
| 355 | }; |
| 356 | |
| 357 | cp0_sdhci_pins: sdhci-pins { |
| 358 | marvell,pins = "mpp55", "mpp56", "mpp57", "mpp58", "mpp59", |
| 359 | "mpp60", "mpp61"; |
| 360 | marvell,function = "sdio"; |
| 361 | }; |
| 362 | }; |
| 363 | |
| 364 | &cp0_pcie0 { |
| 365 | pinctrl-names = "default"; |
| 366 | pinctrl-0 = <&cp0_pci0_reset_pins &cp0_wlan_disable_pins>; |
| 367 | reset-gpios = <&cp0_gpio2 0 GPIO_ACTIVE_LOW>; |
| 368 | phys = <&cp0_comphy0 0>; |
| 369 | phy-names = "cp0-pcie0-x1-phy"; |
| 370 | status = "okay"; |
| 371 | }; |
| 372 | |
| 373 | &cp0_gpio2 { |
| 374 | sata_reset { |
| 375 | gpio-hog; |
| 376 | gpios = <1 GPIO_ACTIVE_HIGH>; |
| 377 | output-high; |
| 378 | }; |
| 379 | |
| 380 | lte_reset { |
| 381 | gpio-hog; |
| 382 | gpios = <2 GPIO_ACTIVE_LOW>; |
| 383 | output-low; |
| 384 | }; |
| 385 | |
| 386 | wlan_disable { |
| 387 | gpio-hog; |
| 388 | gpios = <19 GPIO_ACTIVE_LOW>; |
| 389 | output-low; |
| 390 | }; |
| 391 | |
| 392 | lte_disable { |
| 393 | gpio-hog; |
| 394 | gpios = <21 GPIO_ACTIVE_LOW>; |
| 395 | output-low; |
| 396 | }; |
| 397 | }; |
| 398 | |
| 399 | &cp0_ethernet { |
| 400 | status = "okay"; |
| 401 | }; |
| 402 | |
| 403 | /* SFP */ |
| 404 | &cp0_eth0 { |
| 405 | status = "okay"; |
| 406 | phy-mode = "10gbase-r"; |
| 407 | managed = "in-band-status"; |
| 408 | phys = <&cp0_comphy2 0>; |
| 409 | sfp = <&sfp_cp0_eth0>; |
| 410 | }; |
| 411 | |
| 412 | &cp0_sdhci0 { |
| 413 | broken-cd; |
| 414 | bus-width = <4>; |
| 415 | pinctrl-names = "default"; |
| 416 | pinctrl-0 = <&cp0_sdhci_pins>; |
| 417 | status = "okay"; |
| 418 | vqmmc-supply = <&v_3_3>; |
| 419 | }; |
| 420 | |
| 421 | &cp0_usb3_1 { |
| 422 | status = "okay"; |
| 423 | }; |
| 424 | |
| 425 | &cp1_pinctrl { |
| 426 | /* |
| 427 | * MPP Bus: |
| 428 | * [0-5] TDM |
| 429 | * [6] VHV Enable |
| 430 | * [7] CP1 SPI0 CSn1 (FXS) |
| 431 | * [8] CP1 SPI0 CSn0 (TPM) |
| 432 | * [9.11]CP1 SPI0 MOSI/MISO/CLK |
| 433 | * [13] CP1 SPI1 MISO (TDM and SPI ROM shared) |
| 434 | * [14] CP1 SPI1 CS0n (64Mb SPI ROM) |
| 435 | * [15] CP1 SPI1 MOSI (TDM and SPI ROM shared) |
| 436 | * [16] CP1 SPI1 CLK (TDM and SPI ROM shared) |
| 437 | * [24] Topaz switch reset |
| 438 | * [26] Buzzer |
| 439 | * [27] CP1 SMI MDIO |
| 440 | * [28] CP1 SMI MDC |
| 441 | * [29] CP0 10G SFP TX Disable |
| 442 | * [30] WPS button |
| 443 | * [31] Front panel button |
| 444 | */ |
| 445 | |
| 446 | cp1_spi1_pins: spi1-pins { |
| 447 | marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16"; |
| 448 | marvell,function = "spi1"; |
| 449 | }; |
| 450 | |
| 451 | cp1_switch_reset_pins: switch-reset-pins { |
| 452 | marvell,pins = "mpp24"; |
| 453 | marvell,function = "gpio"; |
| 454 | }; |
| 455 | |
| 456 | cp1_ge_mdio_pins: ge-mdio-pins { |
| 457 | marvell,pins = "mpp27", "mpp28"; |
| 458 | marvell,function = "ge"; |
| 459 | }; |
| 460 | |
| 461 | cp1_sfp_tx_disable_pins: sfp-tx-disable-pins { |
| 462 | marvell,pins = "mpp29"; |
| 463 | marvell,function = "gpio"; |
| 464 | }; |
| 465 | |
| 466 | cp1_wps_button_pins: wps-button-pins { |
| 467 | marvell,pins = "mpp30"; |
| 468 | marvell,function = "gpio"; |
| 469 | }; |
| 470 | }; |
| 471 | |
| 472 | &cp1_sata0 { |
| 473 | pinctrl-0 = <&cp0_pci1_reset_pins>; |
| 474 | status = "okay"; |
| 475 | |
| 476 | sata-port@1 { |
| 477 | phys = <&cp1_comphy0 1>; |
| 478 | phy-names = "cp1-sata0-1-phy"; |
| 479 | }; |
| 480 | }; |
| 481 | |
| 482 | &cp1_mdio { |
| 483 | pinctrl-names = "default"; |
| 484 | pinctrl-0 = <&cp1_ge_mdio_pins>; |
| 485 | status = "okay"; |
| 486 | |
| 487 | ge_phy: ethernet-phy@0 { |
| 488 | /* LED0 - GB link |
| 489 | * LED1 - on: link, blink: activity |
| 490 | */ |
| 491 | marvell,reg-init = <3 16 0 0x1017>; |
| 492 | reg = <0>; |
| 493 | pinctrl-names = "default"; |
| 494 | pinctrl-0 = <&cp0_copper_eth_phy_reset>; |
| 495 | reset-gpios = <&cp0_gpio2 11 GPIO_ACTIVE_LOW>; |
| 496 | reset-assert-us = <10000>; |
| 497 | reset-deassert-us = <10000>; |
| 498 | }; |
| 499 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 500 | switch0: ethernet-switch@4 { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 501 | compatible = "marvell,mv88e6085"; |
| 502 | reg = <4>; |
| 503 | pinctrl-names = "default"; |
| 504 | pinctrl-0 = <&cp1_switch_reset_pins>; |
| 505 | reset-gpios = <&cp1_gpio1 24 GPIO_ACTIVE_LOW>; |
| 506 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 507 | ethernet-ports { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 508 | #address-cells = <1>; |
| 509 | #size-cells = <0>; |
| 510 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 511 | ethernet-port@1 { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 512 | reg = <1>; |
| 513 | label = "lan2"; |
| 514 | phy-handle = <&switch0phy0>; |
| 515 | }; |
| 516 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 517 | ethernet-port@2 { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 518 | reg = <2>; |
| 519 | label = "lan1"; |
| 520 | phy-handle = <&switch0phy1>; |
| 521 | }; |
| 522 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 523 | ethernet-port@3 { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 524 | reg = <3>; |
| 525 | label = "lan4"; |
| 526 | phy-handle = <&switch0phy2>; |
| 527 | }; |
| 528 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 529 | ethernet-port@4 { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 530 | reg = <4>; |
| 531 | label = "lan3"; |
| 532 | phy-handle = <&switch0phy3>; |
| 533 | }; |
| 534 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 535 | ethernet-port@5 { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 536 | reg = <5>; |
| 537 | label = "cpu"; |
| 538 | ethernet = <&cp1_eth2>; |
| 539 | phy-mode = "2500base-x"; |
| 540 | managed = "in-band-status"; |
| 541 | }; |
| 542 | }; |
| 543 | |
| 544 | mdio { |
| 545 | #address-cells = <1>; |
| 546 | #size-cells = <0>; |
| 547 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 548 | switch0phy0: ethernet-phy@11 { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 549 | reg = <0x11>; |
| 550 | }; |
| 551 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 552 | switch0phy1: ethernet-phy@12 { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 553 | reg = <0x12>; |
| 554 | }; |
| 555 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 556 | switch0phy2: ethernet-phy@13 { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 557 | reg = <0x13>; |
| 558 | }; |
| 559 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 560 | switch0phy3: ethernet-phy@14 { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 561 | reg = <0x14>; |
| 562 | }; |
| 563 | }; |
| 564 | }; |
| 565 | }; |
| 566 | |
| 567 | &cp1_ethernet { |
| 568 | status = "okay"; |
| 569 | }; |
| 570 | |
| 571 | /* 1G copper */ |
| 572 | &cp1_eth1 { |
| 573 | status = "okay"; |
| 574 | phy-mode = "sgmii"; |
| 575 | phy = <&ge_phy>; |
| 576 | phys = <&cp1_comphy3 1>; |
| 577 | }; |
| 578 | |
| 579 | /* Switch uplink */ |
| 580 | &cp1_eth2 { |
| 581 | status = "okay"; |
| 582 | phy-mode = "2500base-x"; |
| 583 | phys = <&cp1_comphy5 2>; |
| 584 | managed = "in-band-status"; |
| 585 | }; |
| 586 | |
| 587 | &cp1_spi1 { |
| 588 | pinctrl-names = "default"; |
| 589 | pinctrl-0 = <&cp1_spi1_pins>; |
| 590 | status = "okay"; |
| 591 | |
| 592 | flash@0 { |
| 593 | compatible = "st,w25q32"; |
| 594 | spi-max-frequency = <50000000>; |
| 595 | reg = <0>; |
| 596 | }; |
| 597 | }; |
| 598 | |
| 599 | &cp1_comphy2 { |
| 600 | cp1_usbh0_con: connector { |
| 601 | compatible = "usb-a-connector"; |
| 602 | phy-supply = <&v_5v0_usb3_hst_vbus>; |
| 603 | }; |
| 604 | }; |
| 605 | |
| 606 | &cp1_usb3_0 { |
| 607 | phys = <&cp1_comphy2 0>; |
| 608 | phy-names = "cp1-usb3h0-comphy"; |
| 609 | status = "okay"; |
| 610 | }; |