blob: 3a3d76af86122cbeb4171cf166bc70682756be39 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * lan966x_pcb8291.dts - Device Tree file for PCB8291
4 */
5/dts-v1/;
6#include "lan966x.dtsi"
7#include "dt-bindings/phy/phy-lan966x-serdes.h"
8
9/ {
10 model = "Microchip EVB - LAN9662";
11 compatible = "microchip,lan9662-pcb8291", "microchip,lan9662", "microchip,lan966";
12
13 chosen {
14 stdout-path = "serial0:115200n8";
15 };
16
17 aliases {
18 serial0 = &usart3;
19 };
20
21 gpio-restart {
22 compatible = "gpio-restart";
23 gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
24 priority = <200>;
25 };
26
27 leds {
28 compatible = "gpio-leds";
29
30 led-s0-blue {
31 label = "s0:blue";
32 gpios = <&sgpio_out 2 0 GPIO_ACTIVE_LOW>;
33 default-state = "off";
34 };
35
36 led-s0-green {
37 label = "s0:green";
38 gpios = <&sgpio_out 2 1 GPIO_ACTIVE_LOW>;
39 default-state = "off";
40 };
41
42 led-s1-blue {
43 label = "s1:blue";
44 gpios = <&sgpio_out 3 0 GPIO_ACTIVE_LOW>;
45 default-state = "off";
46 };
47
48 led-s1-green {
49 label = "s1:green";
50 gpios = <&sgpio_out 3 1 GPIO_ACTIVE_LOW>;
51 default-state = "off";
52 };
53 };
54};
55
56&aes {
57 status = "disabled"; /* Reserved by secure OS */
58};
59
60&gpio {
61 fc3_b_pins: fc3-b-pins {
62 /* RX, TX */
63 pins = "GPIO_52", "GPIO_53";
64 function = "fc3_b";
65 };
66
67 can0_b_pins: can0-b-pins {
68 /* RX, TX */
69 pins = "GPIO_35", "GPIO_36";
70 function = "can0_b";
71 };
72
73 sgpio_a_pins: sgpio-a-pins {
74 /* SCK, D0, D1, LD */
75 pins = "GPIO_32", "GPIO_33", "GPIO_34", "GPIO_35";
76 function = "sgpio_a";
77 };
78};
79
80&can0 {
81 pinctrl-0 = <&can0_b_pins>;
82 pinctrl-names = "default";
83 status = "disabled"; /* Conflict with switch */
84};
85
86&flx3 {
87 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
88 status = "okay";
89
90 usart3: serial@200 {
91 pinctrl-0 = <&fc3_b_pins>;
92 pinctrl-names = "default";
93 status = "okay";
94 };
95};
96
97&mdio1 {
98 status = "okay";
99};
100
101&phy0 {
102 status = "okay";
103};
104
105&phy1 {
106 status = "okay";
107};
108
109&port0 {
110 phy-handle = <&phy0>;
111 phy-mode = "gmii";
112 phys = <&serdes 0 CU(0)>;
113 status = "okay";
114};
115
116&port1 {
117 phy-handle = <&phy1>;
118 phy-mode = "gmii";
119 phys = <&serdes 1 CU(1)>;
120 status = "okay";
121};
122
123&serdes {
124 status = "okay";
125};
126
127&sgpio {
128 pinctrl-0 = <&sgpio_a_pins>;
129 pinctrl-names = "default";
130 microchip,sgpio-port-ranges = <0 3>, <8 11>;
131 status = "okay";
132
133 gpio@0 {
134 ngpios = <64>;
135 };
136 gpio@1 {
137 ngpios = <64>;
138 };
139};
140
141&switch {
142 status = "okay";
143};
144
145&watchdog {
146 status = "okay";
147};