| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| 2 | |
| 3 | %YAML 1.2 |
| 4 | --- |
| 5 | $id: http://devicetree.org/schemas/media/rockchip,rk3568-vepu.yaml# |
| 6 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 7 | |
| 8 | title: Hantro G1 VPU encoders implemented on Rockchip SoCs |
| 9 | |
| 10 | maintainers: |
| 11 | - Nicolas Frattaroli <frattaroli.nicolas@gmail.com> |
| 12 | |
| 13 | description: |
| 14 | Hantro G1 video encode-only accelerators present on Rockchip SoCs. |
| 15 | |
| 16 | properties: |
| 17 | compatible: |
| 18 | enum: |
| 19 | - rockchip,rk3568-vepu |
| 20 | |
| 21 | reg: |
| 22 | maxItems: 1 |
| 23 | |
| 24 | interrupts: |
| 25 | maxItems: 1 |
| 26 | |
| 27 | clocks: |
| 28 | maxItems: 2 |
| 29 | |
| 30 | clock-names: |
| 31 | items: |
| 32 | - const: aclk |
| 33 | - const: hclk |
| 34 | |
| 35 | power-domains: |
| 36 | maxItems: 1 |
| 37 | |
| 38 | iommus: |
| 39 | maxItems: 1 |
| 40 | |
| 41 | required: |
| 42 | - compatible |
| 43 | - reg |
| 44 | - interrupts |
| 45 | - clocks |
| 46 | - clock-names |
| 47 | |
| 48 | additionalProperties: false |
| 49 | |
| 50 | examples: |
| 51 | - | |
| 52 | #include <dt-bindings/clock/rk3568-cru.h> |
| 53 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 54 | #include <dt-bindings/power/rk3568-power.h> |
| 55 | |
| 56 | bus { |
| 57 | #address-cells = <2>; |
| 58 | #size-cells = <2>; |
| 59 | |
| 60 | vepu: video-codec@fdee0000 { |
| 61 | compatible = "rockchip,rk3568-vepu"; |
| 62 | reg = <0x0 0xfdee0000 0x0 0x800>; |
| 63 | interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; |
| 64 | clocks = <&cru ACLK_JENC>, <&cru HCLK_JENC>; |
| 65 | clock-names = "aclk", "hclk"; |
| 66 | iommus = <&vepu_mmu>; |
| 67 | power-domains = <&power RK3568_PD_RGA>; |
| 68 | }; |
| 69 | }; |