Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | MediaTek High-Speed DMA Controller |
| 2 | ================================== |
| 3 | |
| 4 | This device follows the generic DMA bindings defined in dma/dma.txt. |
| 5 | |
| 6 | Required properties: |
| 7 | |
| 8 | - compatible: Must be one of |
| 9 | "mediatek,mt7622-hsdma": for MT7622 SoC |
| 10 | "mediatek,mt7623-hsdma": for MT7623 SoC |
| 11 | - reg: Should contain the register's base address and length. |
| 12 | - interrupts: Should contain a reference to the interrupt used by this |
| 13 | device. |
| 14 | - clocks: Should be the clock specifiers corresponding to the entry in |
| 15 | clock-names property. |
| 16 | - clock-names: Should contain "hsdma" entries. |
| 17 | - power-domains: Phandle to the power domain that the device is part of |
| 18 | - #dma-cells: The length of the DMA specifier, must be <1>. This one cell |
| 19 | in dmas property of a client device represents the channel |
| 20 | number. |
| 21 | Example: |
| 22 | |
| 23 | hsdma: dma-controller@1b007000 { |
| 24 | compatible = "mediatek,mt7623-hsdma"; |
| 25 | reg = <0 0x1b007000 0 0x1000>; |
| 26 | interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_LOW>; |
| 27 | clocks = <ðsys CLK_ETHSYS_HSDMA>; |
| 28 | clock-names = "hsdma"; |
| 29 | power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>; |
| 30 | #dma-cells = <1>; |
| 31 | }; |
| 32 | |
| 33 | DMA clients must use the format described in dma/dma.txt file. |