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Michael Schwingen06a9e122008-01-16 19:53:23 +01001/*
2 * (C) Copyright 2007
3 * Michael Schwingen, michael@schwingen.org
4 *
5 * Configuration settings for the AcTux-4 board.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __CONFIG_H
27#define __CONFIG_H
28
29#define CONFIG_IXP425 1
30#define CONFIG_ACTUX4 1
31
32#define CONFIG_DISPLAY_CPUINFO 1
33#define CONFIG_DISPLAY_BOARDINFO 1
34
Jean-Christophe PLAGNIOL-VILLARD08cae4d2009-01-31 09:10:48 +010035#define CONFIG_IXP_SERIAL
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020036#define CONFIG_SYS_IXP425_CONSOLE IXP425_UART1
Michael Schwingen06a9e122008-01-16 19:53:23 +010037#define CONFIG_BAUDRATE 115200
38#define CONFIG_BOOTDELAY 3
39#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
Michael Schwingen67ea3d92011-05-23 00:00:07 +020040#define CONFIG_BOARD_EARLY_INIT_F 1
Michael Schwingen06a9e122008-01-16 19:53:23 +010041
42/***************************************************************
43 * U-boot generic defines start here.
44 ***************************************************************/
Michael Schwingen06a9e122008-01-16 19:53:23 +010045/* Size of malloc() pool */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020046#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
Michael Schwingen06a9e122008-01-16 19:53:23 +010047
48/* allow to overwrite serial and ethaddr */
49#define CONFIG_ENV_OVERWRITE
50
51/* Command line configuration */
52#include <config_cmd_default.h>
53
54#define CONFIG_CMD_ELF
55
Michael Schwingen67ea3d92011-05-23 00:00:07 +020056#define CONFIG_PCI
57#ifdef CONFIG_PCI
58#define CONFIG_CMD_PCI
59#define CONFIG_PCI_PNP
60#define CONFIG_IXP_PCI
61#define CONFIG_PCI_SCAN_SHOW
62#define CONFIG_CMD_PCI_ENUM
63#endif
64
Michael Schwingen06a9e122008-01-16 19:53:23 +010065#define CONFIG_BOOTCOMMAND "run boot_flash"
66/* enable passing of ATAGs */
67#define CONFIG_CMDLINE_TAG 1
68#define CONFIG_SETUP_MEMORY_TAGS 1
69#define CONFIG_INITRD_TAG 1
70
71#if defined(CONFIG_CMD_KGDB)
72# define CONFIG_KGDB_BAUDRATE 230400
73/* which serial port to use */
74# define CONFIG_KGDB_SER_INDEX 1
75#endif
76
77/* Miscellaneous configurable options */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020078#define CONFIG_SYS_LONGHELP
79#define CONFIG_SYS_PROMPT "=> "
Michael Schwingen06a9e122008-01-16 19:53:23 +010080/* Console I/O Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020081#define CONFIG_SYS_CBSIZE 256
Michael Schwingen06a9e122008-01-16 19:53:23 +010082/* Print Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020083#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
Michael Schwingen06a9e122008-01-16 19:53:23 +010084/* max number of command args */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020085#define CONFIG_SYS_MAXARGS 16
Michael Schwingen06a9e122008-01-16 19:53:23 +010086/* Boot Argument Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020087#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
Michael Schwingen06a9e122008-01-16 19:53:23 +010088
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020089#define CONFIG_SYS_MEMTEST_START 0x00400000
90#define CONFIG_SYS_MEMTEST_END 0x00800000
Michael Schwingen06a9e122008-01-16 19:53:23 +010091
Michael Schwingen67ea3d92011-05-23 00:00:07 +020092/* timer clock - 2* OSC_IN system clock */
93#define CONFIG_IXP425_TIMER_CLK 66000000
94#define CONFIG_SYS_HZ 1000
Michael Schwingen06a9e122008-01-16 19:53:23 +010095
96/* default load address */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020097#define CONFIG_SYS_LOAD_ADDR 0x00010000
Michael Schwingen06a9e122008-01-16 19:53:23 +010098
99/* valid baudrates */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200100#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
Michael Schwingen06a9e122008-01-16 19:53:23 +0100101 115200, 230400 }
102#define CONFIG_SERIAL_RTS_ACTIVE 1
103
104/*
105 * Stack sizes
106 * The stack sizes are set up in start.S using the settings below
107 */
108#define CONFIG_STACKSIZE (128*1024) /* regular stack */
Michael Schwingen06a9e122008-01-16 19:53:23 +0100109
110/* Expansion bus settings */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200111#define CONFIG_SYS_EXP_CS0 0xbd113003
Michael Schwingen06a9e122008-01-16 19:53:23 +0100112
113/* SDRAM settings */
114#define CONFIG_NR_DRAM_BANKS 1
115#define PHYS_SDRAM_1 0x00000000
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200116#define CONFIG_SYS_SDRAM_BASE 0x00000000
Michael Schwingen06a9e122008-01-16 19:53:23 +0100117
118/* 32MB SDRAM */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200119#define CONFIG_SYS_SDR_CONFIG 0x18
Michael Schwingen06a9e122008-01-16 19:53:23 +0100120#define PHYS_SDRAM_1_SIZE 0x02000000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200121#define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
122#define CONFIG_SYS_SDR_MODE_CONFIG 0x1
123#define CONFIG_SYS_DRAM_SIZE 0x02000000
Michael Schwingen06a9e122008-01-16 19:53:23 +0100124
125/* FLASH organization */
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200126#define CONFIG_SYS_TEXT_BASE 0x50000000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200127#define CONFIG_SYS_MAX_FLASH_BANKS 2
Michael Schwingen06a9e122008-01-16 19:53:23 +0100128/* max # of sectors per chip */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200129#define CONFIG_SYS_MAX_FLASH_SECT 70
Michael Schwingen06a9e122008-01-16 19:53:23 +0100130#define PHYS_FLASH_1 0x50000000
131#define PHYS_FLASH_2 0x51000000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200132#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
Michael Schwingen06a9e122008-01-16 19:53:23 +0100133
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200134#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
135#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
136#define CONFIG_SYS_MONITOR_LEN (252 << 10)
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200137#define CONFIG_BOARD_SIZE_LIMIT 258048
Michael Schwingen06a9e122008-01-16 19:53:23 +0100138
139/* Use common CFI driver */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200140#define CONFIG_SYS_FLASH_CFI
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200141#define CONFIG_FLASH_CFI_DRIVER
Michael Schwingen06a9e122008-01-16 19:53:23 +0100142/* board provides its own flash_init code */
143#define CONFIG_FLASH_CFI_LEGACY 1
144/* no byte writes on IXP4xx */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200145#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
Michael Schwingen06a9e122008-01-16 19:53:23 +0100146/* SST 39VF020 etc. support */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200147#define CONFIG_SYS_FLASH_LEGACY_256Kx8 1
Michael Schwingen06a9e122008-01-16 19:53:23 +0100148
149/* print 'E' for empty sector on flinfo */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200150#define CONFIG_SYS_FLASH_EMPTY_INFO
Michael Schwingen06a9e122008-01-16 19:53:23 +0100151
152/* Ethernet */
153
154/* include IXP4xx NPE support */
155#define CONFIG_IXP4XX_NPE 1
Michael Schwingen06a9e122008-01-16 19:53:23 +0100156
Michael Schwingen06a9e122008-01-16 19:53:23 +0100157/* NPE0 PHY address */
158#define CONFIG_PHY_ADDR 0x1C
159/* MII PHY management */
160#define CONFIG_MII 1
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200161
Michael Schwingen06a9e122008-01-16 19:53:23 +0100162/* Number of ethernet rx buffers & descriptors */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200163#define CONFIG_SYS_RX_ETH_BUFFER 16
Michael Schwingen06a9e122008-01-16 19:53:23 +0100164
165#define CONFIG_CMD_DHCP
166#define CONFIG_CMD_NET
167#define CONFIG_CMD_MII
168#define CONFIG_CMD_PING
169#undef CONFIG_CMD_NFS
170
171/* BOOTP options */
172#define CONFIG_BOOTP_BOOTFILESIZE
173#define CONFIG_BOOTP_BOOTPATH
174#define CONFIG_BOOTP_GATEWAY
175#define CONFIG_BOOTP_HOSTNAME
176
177/* Cache Configuration */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200178#define CONFIG_SYS_CACHELINE_SIZE 32
Michael Schwingen06a9e122008-01-16 19:53:23 +0100179
180/* environment organization: one complete 4k flash sector */
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200181#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200182#define CONFIG_ENV_SIZE 0x1000
183#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x3f000)
Michael Schwingen06a9e122008-01-16 19:53:23 +0100184
185#define CONFIG_EXTRA_ENV_SETTINGS \
Jean-Christophe PLAGNIOL-VILLARD1948d6c2009-01-31 09:53:39 +0100186 "npe_ucode=51000000\0" \
Michael Schwingen06a9e122008-01-16 19:53:23 +0100187 "mtd=IXP4XX-Flash.0:252k(uboot),4k(uboot_env);" \
188 "IXP4XX-Flash.1:128k(ucode),1280k(linux),-(root)\0" \
189 "kerneladdr=51020000\0" \
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200190 "kernelfile=actux4/uImage\0" \
191 "rootfile=actux4/rootfs\0" \
Michael Schwingen06a9e122008-01-16 19:53:23 +0100192 "rootaddr=51160000\0" \
193 "loadaddr=10000\0" \
194 "updateboot_ser=mw.b 10000 ff 40000;" \
195 " loady ${loadaddr};" \
196 " run eraseboot writeboot\0" \
197 "updateboot_net=mw.b 10000 ff 40000;" \
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200198 " tftp ${loadaddr} actux4/u-boot.bin;" \
Michael Schwingen06a9e122008-01-16 19:53:23 +0100199 " run eraseboot writeboot\0" \
200 "eraseboot=protect off 50000000 5003efff;" \
201 " erase 50000000 +${filesize}\0" \
202 "writeboot=cp.b 10000 50000000 ${filesize}\0" \
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200203 "updateucode=loady;" \
204 " era ${npe_ucode} +${filesize};" \
205 " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \
Michael Schwingen06a9e122008-01-16 19:53:23 +0100206 "updateroot=tftp ${loadaddr} ${rootfile};" \
207 " era ${rootaddr} +${filesize};" \
208 " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
209 "updatekern=tftp ${loadaddr} ${kernelfile};" \
210 " era ${kerneladdr} +${filesize};" \
211 " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \
212 "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \
213 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
214 "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \
215 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
216 "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
217 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
218 "boot_flash=run flashargs addtty addeth;" \
219 " bootm ${kerneladdr}\0" \
220 "boot_net=run netargs addtty addeth;" \
221 " tftpboot ${loadaddr} ${kernelfile};" \
222 " bootm\0"
223
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200224/* additions for new relocation code, must be added to all boards */
225#define CONFIG_SYS_INIT_SP_ADDR \
226 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
227
Michael Schwingen06a9e122008-01-16 19:53:23 +0100228#endif /* __CONFIG_H */