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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Stefan Roese7be1b9b2016-05-25 08:21:21 +02002/*
3 * Copyright (C) 2016 Stefan Roese <sr@denx.de>
Stefan Roese7be1b9b2016-05-25 08:21:21 +02004 */
5
Stefan Roese5c806f12016-10-25 10:56:19 +02006#ifndef _CONFIG_MVEBU_ARMADA_8K_H
7#define _CONFIG_MVEBU_ARMADA_8K_H
Stefan Roese7be1b9b2016-05-25 08:21:21 +02008
9/*
10 * High Level Configuration Options (easy to change)
11 */
12#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
13
Stefan Roese7be1b9b2016-05-25 08:21:21 +020014/* additions for new ARM relocation support */
15#define CONFIG_SYS_SDRAM_BASE 0x00000000
16
Stefan Roese7be1b9b2016-05-25 08:21:21 +020017/* auto boot */
Stefan Roese7be1b9b2016-05-25 08:21:21 +020018
Stefan Roese7be1b9b2016-05-25 08:21:21 +020019#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
20 115200, 230400, 460800, 921600 }
21
22/*
23 * For booting Linux, the board info and command line data
24 * have to be in the first 8 MB of memory, since this is
25 * the maximum mapped by the Linux kernel during initialization.
26 */
27#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
28#define CONFIG_INITRD_TAG /* enable INITRD tag */
29#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
30
31#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
Stefan Roese7be1b9b2016-05-25 08:21:21 +020032
33/*
34 * Size of malloc() pool
35 */
36#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MiB for malloc() */
37
38/*
39 * Other required minimal configurations
40 */
Stefan Roese7be1b9b2016-05-25 08:21:21 +020041#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
Stefan Roese7be1b9b2016-05-25 08:21:21 +020042#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
43#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
44
Stefan Roese7be1b9b2016-05-25 08:21:21 +020045/* End of 16M scrubbed by training in bootrom */
46#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000)
47
Baruch Siach0d022902018-08-14 18:05:46 +030048/* When runtime detection fails this is the default */
49#define CONFIG_SYS_MMC_ENV_DEV 0
50
Konstantin Porotchkin0edf7722017-04-05 18:22:33 +030051#define CONFIG_SYS_MAX_NAND_DEVICE 1
52#define CONFIG_SYS_NAND_MAX_CHIPS 1
53#define CONFIG_SYS_NAND_ONFI_DETECTION
Konstantin Porotchkin0edf7722017-04-05 18:22:33 +030054
Stefan Roese97c3ba02017-02-20 12:25:26 +010055/*
56 * Ethernet Driver configuration
57 */
Stefan Roese97c3ba02017-02-20 12:25:26 +010058#define CONFIG_ARP_TIMEOUT 200
59#define CONFIG_NET_RETRY_COUNT 50
60
Bin Mengabe40262017-07-19 21:50:06 +080061#define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3)
Stefan Roese7be1b9b2016-05-25 08:21:21 +020062
63/* USB ethernet */
Stefan Roese7be1b9b2016-05-25 08:21:21 +020064
65/*
66 * SATA/SCSI/AHCI configuration
67 */
Stefan Roese7be1b9b2016-05-25 08:21:21 +020068#define CONFIG_SCSI_AHCI_PLAT
Stefan Roese7be1b9b2016-05-25 08:21:21 +020069#define CONFIG_LBA48
70#define CONFIG_SYS_64BIT_LBA
71
72#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
73#define CONFIG_SYS_SCSI_MAX_LUN 1
74#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
75 CONFIG_SYS_SCSI_MAX_LUN)
76
Stefan Roesec20e9d52016-10-27 13:36:45 +020077/*
78 * PCI configuration
79 */
80#ifdef CONFIG_PCIE_DW_MVEBU
81#define CONFIG_E1000
Stefan Roesec20e9d52016-10-27 13:36:45 +020082#endif
83
Mark Kettenis8cfb67b2018-03-17 09:34:27 +010084#define BOOT_TARGET_DEVICES(func) \
85 func(MMC, mmc, 1) \
86 func(MMC, mmc, 0) \
87 func(USB, usb, 0) \
88 func(SCSI, scsi, 0) \
89 func(PXE, pxe, na) \
90 func(DHCP, dhcp, na)
91
92#include <config_distro_bootcmd.h>
93
94#define CONFIG_EXTRA_ENV_SETTINGS \
95 "scriptaddr=0x4d00000\0" \
96 "pxefile_addr_r=0x4e00000\0" \
97 "fdt_addr_r=0x4f00000\0" \
98 "kernel_addr_r=0x5000000\0" \
99 "ramdisk_addr_r=0x8000000\0" \
100 "fdtfile=marvell/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
101 BOOTENV
102
Stefan Roese5c806f12016-10-25 10:56:19 +0200103#endif /* _CONFIG_MVEBU_ARMADA_8K_H */