Johan Jonker | fb0f990 | 2022-04-16 17:09:45 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | |
| 3 | #include "rk3066a-u-boot.dtsi" |
| 4 | |
| 5 | / { |
| 6 | config { |
| 7 | u-boot,boot-led = "mk808:blue:power"; |
| 8 | }; |
| 9 | }; |
| 10 | |
| 11 | &cru { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 12 | bootph-all; |
Johan Jonker | fb0f990 | 2022-04-16 17:09:45 +0200 | [diff] [blame] | 13 | }; |
| 14 | |
| 15 | &dmc { |
| 16 | compatible = "rockchip,rk3066-dmc", "syscon"; |
| 17 | rockchip,pctl-timing = <0x12c 0xc8 0x1f4 0x1e 0x4e 0x4 0x69 0x6 |
| 18 | 0x3 0x0 0x6 0x5 0xc 0x10 0x6 0x4 |
| 19 | 0x4 0x5 0x4 0x200 0x3 0xa 0x40 0x0 |
| 20 | 0x1 0x5 0x5 0x3 0xc 0x1e 0x100 0x0 |
| 21 | 0x4 0x0>; |
| 22 | rockchip,phy-timing = <0x208c6690 0x690878 0x10022a00 |
| 23 | 0x220 0x40 0x0 0x0>; |
| 24 | rockchip,sdram-params = <0x24716310 0 2 300000000 3 9 0>; |
| 25 | }; |
| 26 | |
| 27 | &mmc0 { |
| 28 | fifo-mode; |
| 29 | max-frequency = <4000000>; |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 30 | bootph-pre-ram; |
Johan Jonker | fb0f990 | 2022-04-16 17:09:45 +0200 | [diff] [blame] | 31 | u-boot,spl-fifo-mode; |
| 32 | }; |
| 33 | |
| 34 | &mmc1 { |
| 35 | status = "disabled"; |
| 36 | }; |
| 37 | |
| 38 | &noc { |
| 39 | compatible = "rockchip,rk3066-noc", "syscon"; |
| 40 | }; |
| 41 | |
| 42 | &timer2 { |
| 43 | clock-frequency = <24000000>; |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 44 | bootph-all; |
Johan Jonker | fb0f990 | 2022-04-16 17:09:45 +0200 | [diff] [blame] | 45 | }; |
| 46 | |
| 47 | &uart2 { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 48 | bootph-all; |
Johan Jonker | fb0f990 | 2022-04-16 17:09:45 +0200 | [diff] [blame] | 49 | }; |