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Masahiro Yamadaf8efa632015-08-27 12:44:29 +09001#
2# PINCTRL infrastructure and drivers
3#
4
5menu "Pin controllers"
6
7config PINCTRL
8 bool "Support pin controllers"
9 depends on DM
10 help
11 This enables the basic support for pinctrl framework. You may want
12 to enable some more options depending on what you want to do.
13
14config PINCTRL_FULL
15 bool "Support full pin controllers"
16 depends on PINCTRL && OF_CONTROL
17 default y
18 help
19 This provides Linux-compatible device tree interface for the pinctrl
20 subsystem. This feature depends on device tree configuration because
21 it parses a device tree to look for the pinctrl device which the
22 peripheral device is associated with.
23
24 If this option is disabled (it is the only possible choice for non-DT
25 boards), the pinctrl core provides no systematic mechanism for
26 identifying peripheral devices, applying needed pinctrl settings.
27 It is totally up to the implementation of each low-level driver.
28 You can save memory footprint in return for some limitations.
29
30config PINCTRL_GENERIC
31 bool "Support generic pin controllers"
32 depends on PINCTRL_FULL
33 default y
34 help
35 Say Y here if you want to use the pinctrl subsystem through the
36 generic DT interface. If enabled, some functions become available
37 to parse common properties such as "pins", "groups", "functions" and
38 some pin configuration parameters. It would be easier if you only
39 need the generic DT interface for pin muxing and pin configuration.
40 If you need to handle vendor-specific DT properties, you can disable
41 this option and implement your own set_state callback in the pinctrl
42 operations.
43
44config PINMUX
45 bool "Support pin multiplexing controllers"
46 depends on PINCTRL_GENERIC
47 default y
48 help
49 This option enables pin multiplexing through the generic pinctrl
Marek BehĂșn44f62e92018-03-02 09:56:00 +010050 framework. Most SoCs have their own multiplexing arrangement where
51 a single pin can be used for several functions. An SoC pinctrl driver
52 allows the required function to be selected for each pin.
Simon Glass8d6510d2015-08-30 16:55:12 -060053 The driver is typically controlled by the device tree.
Masahiro Yamadaf8efa632015-08-27 12:44:29 +090054
55config PINCONF
56 bool "Support pin configuration controllers"
57 depends on PINCTRL_GENERIC
58 help
59 This option enables pin configuration through the generic pinctrl
60 framework.
61
Patrick Delaunaybcdb1042019-08-02 14:48:00 +020062config PINCONF_RECURSIVE
63 bool "Support recursive binding for pin configuration nodes"
64 depends on PINCTRL_FULL
65 default n if ARCH_STM32MP
66 default y
67 help
68 In the Linux pinctrl binding, the pin configuration nodes need not be
69 direct children of the pin controller device (may be grandchildren for
70 example). It is define is each individual pin controller device.
71 Say Y here if you want to keep this behavior with the pinconfig
Yuan Fang973a9792021-09-08 19:06:48 +080072 u-class: all sub are recursively bounded.
Patrick Delaunaybcdb1042019-08-02 14:48:00 +020073 If the option is disabled, this behavior is deactivated and only
74 the direct children of pin controller will be assumed as pin
75 configuration; you can save memory footprint when this feature is
76 no needed.
77
Masahiro Yamadaf8efa632015-08-27 12:44:29 +090078config SPL_PINCTRL
Philipp Tomsich2b1c2042017-07-26 12:27:42 +020079 bool "Support pin controllers in SPL"
Masahiro Yamadaf8efa632015-08-27 12:44:29 +090080 depends on SPL && SPL_DM
81 help
82 This option is an SPL-variant of the PINCTRL option.
83 See the help of PINCTRL for details.
84
Simon Glass5edf3f32019-12-06 21:41:45 -070085config TPL_PINCTRL
86 bool "Support pin controllers in TPL"
87 depends on TPL && TPL_DM
88 help
89 This option is an TPL variant of the PINCTRL option.
90 See the help of PINCTRL for details.
91
Masahiro Yamadaf8efa632015-08-27 12:44:29 +090092config SPL_PINCTRL_FULL
93 bool "Support full pin controllers in SPL"
94 depends on SPL_PINCTRL && SPL_OF_CONTROL
Vikas Manocha50218ae2017-05-28 12:55:10 -070095 default n if TARGET_STM32F746_DISCO
Masahiro Yamadaf8efa632015-08-27 12:44:29 +090096 default y
97 help
98 This option is an SPL-variant of the PINCTRL_FULL option.
99 See the help of PINCTRL_FULL for details.
100
Simon Glass5edf3f32019-12-06 21:41:45 -0700101config TPL_PINCTRL_FULL
102 bool "Support full pin controllers in TPL"
103 depends on TPL_PINCTRL && TPL_OF_CONTROL
104 help
105 This option is an TPL-variant of the PINCTRL_FULL option.
106 See the help of PINCTRL_FULL for details.
107
Masahiro Yamadaf8efa632015-08-27 12:44:29 +0900108config SPL_PINCTRL_GENERIC
109 bool "Support generic pin controllers in SPL"
110 depends on SPL_PINCTRL_FULL
111 default y
112 help
113 This option is an SPL-variant of the PINCTRL_GENERIC option.
114 See the help of PINCTRL_GENERIC for details.
115
116config SPL_PINMUX
117 bool "Support pin multiplexing controllers in SPL"
118 depends on SPL_PINCTRL_GENERIC
119 default y
120 help
121 This option is an SPL-variant of the PINMUX option.
122 See the help of PINMUX for details.
Simon Glass8d6510d2015-08-30 16:55:12 -0600123 The pinctrl subsystem can add a substantial overhead to the SPL
124 image since it typically requires quite a few tables either in the
125 driver or in the device tree. If this is acceptable and you need
126 to adjust pin multiplexing in SPL in order to boot into U-Boot,
127 enable this option. You will need to enable device tree in SPL
128 for this to work.
Masahiro Yamadaf8efa632015-08-27 12:44:29 +0900129
130config SPL_PINCONF
131 bool "Support pin configuration controllers in SPL"
132 depends on SPL_PINCTRL_GENERIC
133 help
134 This option is an SPL-variant of the PINCONF option.
135 See the help of PINCONF for details.
136
Patrick Delaunaybcdb1042019-08-02 14:48:00 +0200137config SPL_PINCONF_RECURSIVE
138 bool "Support recursive binding for pin configuration nodes in SPL"
139 depends on SPL_PINCTRL_FULL
140 default n if ARCH_STM32MP
141 default y
142 help
143 This option is an SPL-variant of the PINCONF_RECURSIVE option.
144 See the help of PINCONF_RECURSIVE for details.
145
Masahiro Yamadaf8efa632015-08-27 12:44:29 +0900146if PINCTRL || SPL_PINCTRL
147
Mark Kettenisc9329762021-11-02 18:21:57 +0100148config PINCTRL_APPLE
149 bool "Apple pinctrl driver"
150 depends on DM && PINCTRL_GENERIC && ARCH_APPLE
151 default y
152 help
153 Support pin multiplexing on Apple SoCs.
154
155 The driver is controlled by a device tree node which contains
156 both the GPIO definitions and pin control functions for each
157 available multiplex function.
158
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200159config PINCTRL_AR933X
Wills Wang77ae2382016-03-16 16:59:55 +0800160 bool "QCA/Athores ar933x pin control driver"
161 depends on DM && SOC_AR933X
162 help
163 Support pin multiplexing control on QCA/Athores ar933x SoCs.
164 The driver is controlled by a device tree node which contains
165 both the GPIO definitions and pin control functions for each
166 available multiplex function.
167
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200168config PINCTRL_AT91
169 bool "AT91 pinctrl driver"
170 depends on DM
171 help
172 This option is to enable the AT91 pinctrl driver for AT91 PIO
173 controller.
174
175 AT91 PIO controller is a combined gpio-controller, pin-mux and
176 pin-config module. Each I/O pin may be dedicated as a general-purpose
177 I/O or be assigned to a function of an embedded peripheral. Each I/O
178 pin has a glitch filter providing rejection of glitches lower than
179 one-half of peripheral clock cycle and a debouncing filter providing
180 rejection of unwanted pulses from key or push button operations. You
181 can also control the multi-driver capability, pull-up and pull-down
182 feature on each I/O pin.
183
184config PINCTRL_AT91PIO4
185 bool "AT91 PIO4 pinctrl driver"
186 depends on DM
187 help
188 This option is to enable the AT91 pinctrl driver for AT91 PIO4
189 controller which is available on SAMA5D2 SoC.
190
Simon Glass837a66a2019-12-06 21:42:53 -0700191config PINCTRL_INTEL
192 bool "Standard Intel pin-control and pin-mux driver"
193 help
194 Recent Intel chips such as Apollo Lake (APL) use a common pin control
195 and GPIO scheme. The settings for this come from an SoC-specific
196 driver which must be separately enabled. The driver supports setting
197 pins on start-up and changing the GPIO attributes.
198
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200199config PINCTRL_PIC32
200 bool "Microchip PIC32 pin-control and pin-mux driver"
201 depends on DM && MACH_PIC32
202 default y
203 help
204 Supports individual pin selection and configuration for each
205 remappable peripheral available on Microchip PIC32
206 SoCs. This driver is controlled by a device tree node which
Chris Packham3fede312019-01-13 22:13:26 +1300207 contains both GPIO definition and pin control functions.
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200208
209config PINCTRL_QCA953X
Wills Wanga56de4c2016-03-16 16:59:56 +0800210 bool "QCA/Athores qca953x pin control driver"
211 depends on DM && SOC_QCA953X
212 help
213 Support pin multiplexing control on QCA/Athores qca953x SoCs.
Wills Wanga56de4c2016-03-16 16:59:56 +0800214
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200215 The driver is controlled by a device tree node which contains both
216 the GPIO definitions and pin control functions for each available
217 multiplex function.
218
Heiko Schocher3b07a132020-02-03 10:23:53 +0100219config PINCTRL_QE
220 bool "QE based pinctrl driver, like on mpc83xx"
221 depends on DM
222 help
223 This option is to enable the QE pinctrl driver for QE based io
224 controller.
225
Andy Yan96c3da92017-06-01 18:00:10 +0800226config PINCTRL_ROCKCHIP_RV1108
227 bool "Rockchip rv1108 pin control driver"
228 depends on DM
229 help
230 Support pin multiplexing control on Rockchip rv1108 SoC.
231
232 The driver is controlled by a device tree node which contains
233 both the GPIO definitions and pin control functions for each
234 available multiplex function.
235
Masahiro Yamada0b53a752015-08-27 12:44:30 +0900236config PINCTRL_SANDBOX
237 bool "Sandbox pinctrl driver"
238 depends on SANDBOX
239 help
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200240 This enables pinctrl driver for sandbox.
Masahiro Yamada0b53a752015-08-27 12:44:30 +0900241
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200242 Currently, this driver actually does nothing but print debug
243 messages when pinctrl operations are invoked.
244
245config PINCTRL_SINGLE
246 bool "Single register pin-control and pin-multiplex driver"
247 depends on DM
Purna Chandra Mandaldb4fbfc2016-01-28 15:30:12 +0530248 help
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200249 This enables pinctrl driver for systems using a single register for
250 pin configuration and multiplexing. TI's AM335X SoCs are examples of
251 such systems.
252
253 Depending on the platform make sure to also enable OF_TRANSLATE and
254 eventually SPL_OF_TRANSLATE to get correct address translations.
Purna Chandra Mandaldb4fbfc2016-01-28 15:30:12 +0530255
Patrice Chotard32cf0462017-02-21 13:37:10 +0100256config PINCTRL_STI
257 bool "STMicroelectronics STi pin-control and pin-mux driver"
258 depends on DM && ARCH_STI
259 default y
260 help
261 Support pin multiplexing control on STMicrolectronics STi SoCs.
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200262
Patrice Chotard32cf0462017-02-21 13:37:10 +0100263 The driver is controlled by a device tree node which contains both
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200264 the GPIO definitions and pin control functions for each available
265 multiplex function.
Patrice Chotard32cf0462017-02-21 13:37:10 +0100266
Vikas Manocha07e9e412017-02-12 10:25:49 -0800267config PINCTRL_STM32
268 bool "ST STM32 pin control driver"
269 depends on DM
270 help
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200271 Supports pin multiplexing control on stm32 SoCs.
Vikas Manocha07e9e412017-02-12 10:25:49 -0800272
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200273 The driver is controlled by a device tree node which contains both
274 the GPIO definitions and pin control functions for each available
275 multiplex function.
Felix Brack7bc23542017-03-22 11:26:44 +0100276
Patrick Delaunayd65291b2019-03-11 11:13:15 +0100277config PINCTRL_STMFX
278 bool "STMicroelectronics STMFX I2C GPIO expander pinctrl driver"
279 depends on DM && PINCTRL_FULL
280 help
281 I2C driver for STMicroelectronics Multi-Function eXpander (STMFX)
282 GPIO expander.
283 Supports pin multiplexing control on stm32 SoCs.
284
285 The driver is controlled by a device tree node which contains both
286 the GPIO definitions and pin control functions for each available
287 multiplex function.
288
289config SPL_PINCTRL_STMFX
290 bool "STMicroelectronics STMFX I2C GPIO expander pinctrl driver in SPL"
291 depends on SPL_PINCTRL_FULL
292 help
293 This option is an SPL-variant of the SPL_PINCTRL_STMFX option.
294 See the help of PINCTRL_STMFX for details.
295
maxims@google.com54651aa2017-04-17 12:00:27 -0700296config ASPEED_AST2500_PINCTRL
Michal Simek8d4e7e22020-07-23 09:00:40 +0200297 bool "Aspeed AST2500 pin control driver"
298 depends on DM && PINCTRL_GENERIC && ASPEED_AST2500
299 default y
300 help
301 Support pin multiplexing control on Aspeed ast2500 SoC. The driver
302 uses Generic Pinctrl framework and is compatible with the Linux
303 driver, i.e. it uses the same device tree configuration.
maxims@google.com54651aa2017-04-17 12:00:27 -0700304
Ryan Chen1efbd142021-11-02 10:17:52 +0800305config ASPEED_AST2600_PINCTRL
306 bool "Aspeed AST2600 pin control driver"
307 depends on DM && PINCTRL_GENERIC && ASPEED_AST2600
308 default y
309 help
310 Support pin multiplexing control on Aspeed ast2600 SoC. The driver
311 uses Generic Pinctrl framework and is compatible with the Linux
312 driver, i.e. it uses the same device tree configuration.
313
Sean Anderson087dfce2020-09-14 11:01:58 -0400314config PINCTRL_K210
315 bool "Kendryte K210 Fully-Programmable Input/Output Array driver"
316 depends on DM && PINCTRL_GENERIC
317 help
318 Support pin multiplexing on the K210. The "FPIOA" can remap any
319 supported function to any multifunctional IO pin. It can also perform
320 basic GPIO functions, such as reading the current value of a pin.
Masahiro Yamadaf8efa632015-08-27 12:44:29 +0900321endif
322
Philipp Tomsich126493f2019-02-01 15:11:48 +0100323source "drivers/pinctrl/broadcom/Kconfig"
324source "drivers/pinctrl/exynos/Kconfig"
Simon Glass837a66a2019-12-06 21:42:53 -0700325source "drivers/pinctrl/intel/Kconfig"
developer84c7a632018-11-15 10:07:58 +0800326source "drivers/pinctrl/mediatek/Kconfig"
Philipp Tomsich126493f2019-02-01 15:11:48 +0100327source "drivers/pinctrl/meson/Kconfig"
328source "drivers/pinctrl/mscc/Kconfig"
developere1947812019-09-25 17:45:26 +0800329source "drivers/pinctrl/mtmips/Kconfig"
Philipp Tomsich126493f2019-02-01 15:11:48 +0100330source "drivers/pinctrl/mvebu/Kconfig"
Stefan Boschbe278c12020-07-10 19:07:30 +0200331source "drivers/pinctrl/nexell/Kconfig"
Peng Fane2fd36cc2016-02-03 10:06:07 +0800332source "drivers/pinctrl/nxp/Kconfig"
Marek Vasut3066a062017-09-15 21:13:55 +0200333source "drivers/pinctrl/renesas/Kconfig"
Philipp Tomsich2b19e902019-02-01 15:15:38 +0100334source "drivers/pinctrl/rockchip/Kconfig"
Masahiro Yamada847e618b82015-09-11 20:17:32 +0900335source "drivers/pinctrl/uniphier/Kconfig"
336
Masahiro Yamadaf8efa632015-08-27 12:44:29 +0900337endmenu