blob: 71b392adc3613f64fefd36896b8b0fd1d877fede [file] [log] [blame]
Angelo Dureghelloc6164c92019-03-13 21:46:41 +01001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
4 */
5
6/ {
7 compatible = "fsl,mcf5441x";
8
9 aliases {
10 serial0 = &uart0;
11 spi0 = &dspi0;
12 };
13
14 soc {
15 compatible = "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
18
19 uart0: uart@fc060000 {
20 compatible = "fsl,mcf-uart";
21 reg = <0xfc060000 0x40>;
22 status = "disabled";
23 };
24
25 uart1: uart@fc064000 {
26 compatible = "fsl,mcf-uart";
27 reg = <0xfc064000 0x40>;
28 status = "disabled";
29 };
30
31 uart2: uart@fc068000 {
32 compatible = "fsl,mcf-uart";
33 reg = <0xfc068000 0x40>;
34 status = "disabled";
35 };
36
37 uart3: uart@fc06c000 {
38 compatible = "fsl,mcf-uart";
39 reg = <0xfc06c000 0x40>;
40 status = "disabled";
41 };
42
43 dspi0: dspi@fc05c000 {
44 compatible = "fsl,mcf-dspi";
45 #address-cells = <1>;
46 #size-cells = <0>;
47 reg = <0xfc05c000 0x100>;
48 spi-max-frequency = <50000000>;
49 num-cs = <4>;
50 spi-mode = <0>;
51 status = "disabled";
52 };
53
54 dspi1: dspi@fc03c000 {
55 compatible = "fsl,mcf-dspi";
56 #address-cells = <1>;
57 #size-cells = <0>;
58 reg = <0xfc03c000 0x100>;
59 spi-max-frequency = <50000000>;
60 num-cs = <4>;
61 spi-mode = <0>;
62 status = "disabled";
63 };
64
65 dspi2: dspi@ec038000 {
66 compatible = "fsl,mcf-dspi";
67 #address-cells = <1>;
68 #size-cells = <0>;
69 reg = <0xec038000 0x100>;
70 spi-max-frequency = <50000000>;
71 num-cs = <4>;
72 spi-mode = <0>;
73 status = "disabled";
74 };
75
76 dspi3: dspi@ec03c000 {
77 compatible = "fsl,mcf-dspi";
78 #address-cells = <1>;
79 #size-cells = <0>;
80 reg = <0xec03c00 0x100>;
81 spi-max-frequency = <50000000>;
82 num-cs = <4>;
83 spi-mode = <0>;
84 status = "disabled";
85 };
86 };
87};