Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 39bf18d8fe1f83346555e1b241130e1fc35a01ec / . / arch / arm / cpu / arm926ejs / mx25 / timer.c
blob: 7f197917365c4cc68c88344f562379f85f502966 [file] [log] [blame]
John Rigby9c146032010-01-25 23:12:56 -0700[diff] [blame]1/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Alex Zuepke <azu@sysgo.de>
9 *
10 * (C) Copyright 2002
11 * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
12 *
13 * (C) Copyright 2009
14 * Ilya Yanok, Emcraft Systems Ltd, <yanok@emcraft.com>
15 *
16 * (C) Copyright 2009 DENX Software Engineering
17 * Author: John Rigby <jrigby@gmail.com>
Fabio Estevamf231efb2011-10-13 05:34:59 +0000[diff] [blame]18 * Add support for MX25
John Rigby9c146032010-01-25 23:12:56 -0700[diff] [blame]19 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +0200[diff] [blame]20 * SPDX-License-Identifier: GPL-2.0+
John Rigby9c146032010-01-25 23:12:56 -0700[diff] [blame]21 */
22
23#include <common.h>
John Rigby9c146032010-01-25 23:12:56 -0700[diff] [blame]24#include <asm/io.h>
25#include <asm/arch/imx-regs.h>
John Rigby9c146032010-01-25 23:12:56 -0700[diff] [blame]26
27/* nothing really to do with interrupts, just starts up a counter. */
28/* The 32KHz 32-bit timer overruns in 134217 seconds */
29int timer_init(void)
30{
31 int i;
32 struct gpt_regs *gpt = (struct gpt_regs *)IMX_GPT1_BASE;
33 struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
34
35 /* setup GP Timer 1 */
36 writel(GPT_CTRL_SWR, &gpt->ctrl);
37
38 writel(readl(&ccm->cgr1) | CCM_CGR1_GPT1, &ccm->cgr1);
39
40 for (i = 0; i < 100; i++)
41 writel(0, &gpt->ctrl); /* We have no udelay by now */
42 writel(0, &gpt->pre); /* prescaler = 1 */
43 /* Freerun Mode, 32KHz input */
44 writel(readl(&gpt->ctrl) | GPT_CTRL_CLKSOURCE_32 | GPT_CTRL_FRR,
45 &gpt->ctrl);
46 writel(readl(&gpt->ctrl) | GPT_CTRL_TEN, &gpt->ctrl);
47
48 return 0;
49}