blob: d805f09e3f2403a6f4d74f2d200be42a75add703 [file] [log] [blame]
wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2001
3 * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <mpc824x.h>
26#include <pci.h>
27
28int checkboard (void)
29{
30 ulong busfreq = get_bus_freq(0);
31 char buf[32];
32
33 printf("Board: MUSENKI Local Bus at %s MHz\n", strmhz(buf, busfreq));
34 return 0;
35
36}
37
38#if 0 /* NOT USED */
39int checkflash (void)
40{
41 /* TODO: XXX XXX XXX */
42 printf ("## Test not implemented yet ##\n");
43
44 return (0);
45}
46#endif
47
48long int initdram (int board_type)
49{
50 int i, cnt;
51 volatile uchar * base= CFG_SDRAM_BASE;
52 volatile ulong * addr;
53 ulong save[32];
54 ulong val, ret = 0;
55
56 for (i=0, cnt=(CFG_MAX_RAM_SIZE / sizeof(long)) >> 1; cnt > 0; cnt >>= 1) {
57 addr = (volatile ulong *)base + cnt;
58 save[i++] = *addr;
59 *addr = ~cnt;
60 }
61
62 addr = (volatile ulong *)base;
63 save[i] = *addr;
64 *addr = 0;
65
66 if (*addr != 0) {
67 *addr = save[i];
68 goto Done;
69 }
70
71 for (cnt = 1; cnt <= CFG_MAX_RAM_SIZE / sizeof(long); cnt <<= 1) {
72 addr = (volatile ulong *)base + cnt;
73 val = *addr;
74 *addr = save[--i];
75 if (val != ~cnt) {
76 ulong new_bank0_end = cnt * sizeof(long) - 1;
77 ulong mear1 = mpc824x_mpc107_getreg(MEAR1);
78 ulong emear1 = mpc824x_mpc107_getreg(EMEAR1);
79 mear1 = (mear1 & 0xFFFFFF00) |
80 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
81 emear1 = (emear1 & 0xFFFFFF00) |
82 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
83 mpc824x_mpc107_setreg(MEAR1, mear1);
84 mpc824x_mpc107_setreg(EMEAR1, emear1);
85
86 ret = cnt * sizeof(long);
87 goto Done;
88 }
89 }
90
91 ret = CFG_MAX_RAM_SIZE;
92Done:
93 return ret;
94}
95
96/*
97 * Initialize PCI Devices
98 */
99#ifndef CONFIG_PCI_PNP
100static struct pci_config_table pci_sandpoint_config_table[] = {
101#if 0
102 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
103 0x0, 0x0, 0x0, /* unknown eth0 divice */
104 pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
105 PCI_ENET0_MEMADDR,
106 PCI_COMMAND_IO |
107 PCI_COMMAND_MEMORY |
108 PCI_COMMAND_MASTER }},
109 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
110 0x0, 0x0, 0x0, /* unknown eth1 device */
111 pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
112 PCI_ENET1_MEMADDR,
113 PCI_COMMAND_IO |
114 PCI_COMMAND_MEMORY |
115 PCI_COMMAND_MASTER }},
116#endif
117 { }
118};
119#endif
120
121struct pci_controller hose = {
122#ifndef CONFIG_PCI_PNP
123 config_table: pci_sandpoint_config_table,
124#endif
125};
126
stroesef5dd4102003-02-14 11:21:23 +0000127void pci_init_board(void)
wdenkc6097192002-11-03 00:24:07 +0000128{
129 pci_mpc824x_init(&hose);
130}