blob: 12358f1b619886d503865d83d7ab292fedee9a15 [file] [log] [blame]
Ilya Yanok37651282012-02-07 23:30:22 +00001/*
2 * Copyright (C) 2011 Ilya Yanok, Emcraft Systems
3 *
4 * Based on ti/evm/evm.c
5 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Ilya Yanok37651282012-02-07 23:30:22 +00007 */
8
9#include <common.h>
10#include <asm/io.h>
11#include <asm/arch/mem.h>
12#include <asm/arch/mmc_host_def.h>
13#include <asm/arch/mux.h>
14#include <asm/arch/sys_proto.h>
15#include <asm/mach-types.h>
16#include <asm/gpio.h>
17#include <asm/omap_gpio.h>
Stefano Babic756a7bf2012-10-20 23:56:07 +000018#include <asm/arch/dss.h>
Lokesh Vutla61c517f2013-05-30 02:54:32 +000019#include <asm/arch/clock.h>
Masahiro Yamadaadae2ec2016-09-21 11:28:53 +090020#include <errno.h>
Ilya Yanok37651282012-02-07 23:30:22 +000021#include <i2c.h>
22#ifdef CONFIG_USB_EHCI
23#include <usb.h>
24#include <asm/ehci-omap.h>
25#endif
26#include "mcx.h"
27
28DECLARE_GLOBAL_DATA_PTR;
29
Stefano Babic72c72122012-10-16 04:07:04 +000030#define HOT_WATER_BUTTON 42
Stefano Babic756a7bf2012-10-20 23:56:07 +000031#define LCD_OUTPUT 55
32
33/* Address of the framebuffer in RAM. */
34#define FB_START_ADDRESS 0x88000000
Stefano Babic5b5d8042012-06-13 22:34:44 +000035
Ilya Yanok37651282012-02-07 23:30:22 +000036#ifdef CONFIG_USB_EHCI
37static struct omap_usbhs_board_data usbhs_bdata = {
38 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
Stefano Babic72c72122012-10-16 04:07:04 +000039 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
Ilya Yanok37651282012-02-07 23:30:22 +000040 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
41};
42
Troy Kisky7d6bbb92013-10-10 15:27:57 -070043int ehci_hcd_init(int index, enum usb_init_type init,
44 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
Ilya Yanok37651282012-02-07 23:30:22 +000045{
Mateusz Zalegad862f892013-10-04 19:22:26 +020046 return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
Ilya Yanok37651282012-02-07 23:30:22 +000047}
48
Lucas Stach3494a4c2012-09-26 00:14:35 +020049int ehci_hcd_stop(int index)
Ilya Yanok37651282012-02-07 23:30:22 +000050{
51 return omap_ehci_hcd_stop();
52}
53#endif
54
55/*
56 * Routine: board_init
57 * Description: Early hardware init.
58 */
59int board_init(void)
60{
61 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
62 /* boot param addr */
63 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
64
Stefano Babic756a7bf2012-10-20 23:56:07 +000065 gpio_direction_output(LCD_OUTPUT, 0);
66
Stefano Babic5b5d8042012-06-13 22:34:44 +000067 return 0;
68}
69
70#ifdef CONFIG_BOARD_LATE_INIT
71int board_late_init(void)
72{
73 if (gpio_request(HOT_WATER_BUTTON, "hot-water-button") < 0) {
74 puts("Failed to get hot-water-button pin\n");
75 return -ENODEV;
76 }
77 gpio_direction_input(HOT_WATER_BUTTON);
78
79 /*
80 * if hot-water-button is pressed
81 * change bootcmd
82 */
83 if (gpio_get_value(HOT_WATER_BUTTON))
84 return 0;
85
86 setenv("bootcmd", "run swupdate");
Stefano Babic72c72122012-10-16 04:07:04 +000087
Ilya Yanok37651282012-02-07 23:30:22 +000088 return 0;
89}
Stefano Babic5b5d8042012-06-13 22:34:44 +000090#endif
Ilya Yanok37651282012-02-07 23:30:22 +000091
92/*
Ilya Yanok37651282012-02-07 23:30:22 +000093 * Routine: set_muxconf_regs
94 * Description: Setting up the configuration Mux registers specific to the
95 * hardware. Many pins need to be moved from protect to primary
96 * mode.
97 */
98void set_muxconf_regs(void)
99{
100 MUX_MCX();
101}
102
Jean-Jacques Hiblote0e319a2017-02-01 11:39:14 +0100103#if defined(CONFIG_MMC_OMAP_HS)
Ilya Yanok37651282012-02-07 23:30:22 +0000104int board_mmc_init(bd_t *bis)
105{
Nikita Kiryanov4be9dbc2012-12-03 02:19:47 +0000106 return omap_mmc_init(0, 0, 0, -1, -1);
Ilya Yanok37651282012-02-07 23:30:22 +0000107}
108#endif
Stefano Babic756a7bf2012-10-20 23:56:07 +0000109
110#if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
111
112static struct panel_config lcd_cfg = {
113 .timing_h = PANEL_TIMING_H(40, 40, 48),
114 .timing_v = PANEL_TIMING_V(29, 13, 3),
115 .pol_freq = 0x00003000, /* Pol Freq */
116 .divisor = 0x0001000E,
117 .panel_type = 0x01, /* TFT */
118 .data_lines = 0x03, /* 24 Bit RGB */
119 .load_mode = 0x02, /* Frame Mode */
120 .panel_color = 0,
121 .lcd_size = PANEL_LCD_SIZE(800, 480),
Nikita Kiryanov65bd0af2013-01-30 21:39:55 +0000122 .gfx_format = GFXFORMAT_RGB24_UNPACKED,
Stefano Babic756a7bf2012-10-20 23:56:07 +0000123};
124
125int board_video_init(void)
126{
127 struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
128 void *fb;
129
130 fb = (void *)FB_START_ADDRESS;
131
132 lcd_cfg.frame_buffer = fb;
133
134 setbits_le32(&prcm_base->fclken_dss, FCK_DSS_ON);
135 setbits_le32(&prcm_base->iclken_dss, ICK_DSS_ON);
136
137 omap3_dss_panel_config(&lcd_cfg);
138 omap3_dss_enable();
139
140 return 0;
141}
142#endif