Grant Erickson | b693341 | 2008-05-22 14:44:14 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2008 Nuovation System Designs, LLC |
| 3 | * Grant Erickson <gerickson@nuovations.com> |
| 4 | * |
Stefan Roese | cb9ebd0 | 2009-09-28 17:33:45 +0200 | [diff] [blame] | 5 | * Copyright (c) 2007-2009 DENX Software Engineering, GmbH |
Grant Erickson | b693341 | 2008-05-22 14:44:14 -0700 | [diff] [blame] | 6 | * Stefan Roese <sr@denx.de> |
| 7 | * |
| 8 | * See file CREDITS for list of people who contributed to this |
| 9 | * project. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or |
| 12 | * modify it under the terms of the GNU General Public License as |
| 13 | * published by the Free Software Foundation; either version 2 of |
| 14 | * the License, or (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will abe useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, write to the Free Software |
| 23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 24 | * MA 02111-1307 USA |
| 25 | * |
| 26 | * Description: |
| 27 | * This file implements ECC initialization for PowerPC processors |
Stefan Roese | cb9ebd0 | 2009-09-28 17:33:45 +0200 | [diff] [blame] | 28 | * using the IBM SDRAM DDR1 & DDR2 controller. |
Grant Erickson | b693341 | 2008-05-22 14:44:14 -0700 | [diff] [blame] | 29 | * |
| 30 | */ |
| 31 | |
| 32 | #ifndef _ECC_H_ |
| 33 | #define _ECC_H_ |
| 34 | |
Stefan Roese | 8b83ec6 | 2008-06-02 17:20:03 +0200 | [diff] [blame] | 35 | /* |
| 36 | * Since the IBM DDR controller used on 440GP/GX/EP/GR is not register |
| 37 | * compatible to the IBM DDR/2 controller used on 405EX/440SP/SPe/460EX/GT |
| 38 | * we need to make some processor dependant defines used later on by the |
| 39 | * driver. |
| 40 | */ |
| 41 | |
| 42 | /* For 440GP/GX/EP/GR */ |
| 43 | #if defined(CONFIG_SDRAM_PPC4xx_IBM_DDR) |
Stefan Roese | cb9ebd0 | 2009-09-28 17:33:45 +0200 | [diff] [blame] | 44 | #define SDRAM_MCOPT1 SDRAM_CFG0 |
| 45 | #define SDRAM_MCOPT1_MCHK_MASK SDRAM_CFG0_MCHK_MASK |
| 46 | #define SDRAM_MCOPT1_MCHK_NON SDRAM_CFG0_MCHK_NON |
| 47 | #define SDRAM_MCOPT1_MCHK_GEN SDRAM_CFG0_MCHK_GEN |
| 48 | #define SDRAM_MCOPT1_MCHK_CHK SDRAM_CFG0_MCHK_CHK |
| 49 | #define SDRAM_MCOPT1_MCHK_CHK_REP SDRAM_CFG0_MCHK_CHK |
| 50 | #define SDRAM_MCOPT1_DMWD_MASK SDRAM_CFG0_DMWD_MASK |
| 51 | #define SDRAM_MCOPT1_DMWD_32 SDRAM_CFG0_DMWD_32 |
Stefan Roese | 8b83ec6 | 2008-06-02 17:20:03 +0200 | [diff] [blame] | 52 | |
Stefan Roese | cb9ebd0 | 2009-09-28 17:33:45 +0200 | [diff] [blame] | 53 | #define SDRAM_MCSTAT SDRAM0_MCSTS |
| 54 | #define SDRAM_MCSTAT_IDLE_MASK SDRAM_MCSTS_CIS |
| 55 | #define SDRAM_MCSTAT_IDLE_NOT SDRAM_MCSTS_IDLE_NOT |
| 56 | |
| 57 | #define SDRAM_ECCES SDRAM0_ECCESR |
Stefan Roese | 8b83ec6 | 2008-06-02 17:20:03 +0200 | [diff] [blame] | 58 | #endif |
| 59 | |
Stefan Roese | cb9ebd0 | 2009-09-28 17:33:45 +0200 | [diff] [blame] | 60 | void ecc_init(unsigned long * const start, unsigned long size); |
| 61 | void do_program_ecc(unsigned long tlb_word2_i_value); |
| 62 | |
| 63 | static void inline blank_string(int size) |
| 64 | { |
| 65 | int i; |
| 66 | |
| 67 | for (i = 0; i < size; i++) |
| 68 | putc('\b'); |
| 69 | for (i = 0; i < size; i++) |
| 70 | putc(' '); |
| 71 | for (i = 0; i < size; i++) |
| 72 | putc('\b'); |
| 73 | } |
Grant Erickson | b693341 | 2008-05-22 14:44:14 -0700 | [diff] [blame] | 74 | |
| 75 | #endif /* _ECC_H_ */ |