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git01.mediatek.com / filogic / uboot / 383a650ddc77635187273f9a44661e56dc8b2b0b / . / configs / at91sam9rlek_mmc_defconfig
blob: 38357632e7d54fe7a38c5b4f023410f94b6898a6 [file] [log] [blame]
Wu, Josh7ff194f2015-02-02 17:51:01 +0800[diff] [blame]1CONFIG_ARM=y
Adam Fordd36b1022019-08-14 08:29:25 -0500[diff] [blame]2CONFIG_ARCH_CPU_INIT=y
Tom Rini340fcdb2015-03-20 10:47:38 -0400[diff] [blame]3CONFIG_ARCH_AT91=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]4CONFIG_SYS_TEXT_BASE=0x21F00000
Wu, Josh7ff194f2015-02-02 17:51:01 +0800[diff] [blame]5CONFIG_TARGET_AT91SAM9RLEK=y
Wenyou Yang3cbbeb12017-04-18 15:28:27 +0800[diff] [blame]6CONFIG_SYS_MALLOC_F_LEN=0x2000
Markus Klotzbuecher7bd60e62019-05-15 15:15:54 +0200[diff] [blame]7CONFIG_ENV_SIZE=0x4000
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame]8CONFIG_NR_DRAM_BANKS=1
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]9CONFIG_DEBUG_UART_BOARD_INIT=y
10CONFIG_DEBUG_UART_BASE=0xfffff200
11CONFIG_DEBUG_UART_CLOCK=100000000
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]12CONFIG_DEBUG_UART=y
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]13CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_MMC"
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]14CONFIG_BOOTDELAY=3
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]15CONFIG_USE_BOOTARGS=y
16CONFIG_BOOTARGS="console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/uboot/kernel)ro,-(rootfs) root=/dev/mmcblk0p2 rw rootwait"
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]17# CONFIG_CONSOLE_MUX is not set
18CONFIG_SYS_CONSOLE_IS_IN_ENV=y
Lokesh Vutla94d95e42016-10-11 21:33:46 -0400[diff] [blame]19# CONFIG_DISPLAY_BOARDINFO is not set
Wu, Josha9b5d1a2015-02-03 18:19:05 +0800[diff] [blame]20CONFIG_HUSH_PARSER=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]21CONFIG_SYS_PROMPT="U-Boot> "
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]22# CONFIG_CMD_BDI is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]23CONFIG_CMD_BOOTZ=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]24# CONFIG_CMD_IMI is not set
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]25# CONFIG_CMD_LOADS is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]26CONFIG_CMD_MMC=y
Tom Rini00448d22017-07-28 21:31:42 -0400[diff] [blame]27CONFIG_CMD_NAND=y
Wenyou.Yang@microchip.com5d7fd3e2017-07-21 13:40:10 +0800[diff] [blame]28CONFIG_CMD_SF=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]29# CONFIG_CMD_SOURCE is not set
30# CONFIG_CMD_SETEXPR is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]31CONFIG_CMD_FAT=y
Wenyou Yang3cbbeb12017-04-18 15:28:27 +0800[diff] [blame]32CONFIG_OF_CONTROL=y
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]33CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]34CONFIG_ENV_IS_IN_FAT=y
Michal Simek2f785a12018-02-26 16:01:02 +0100[diff] [blame]35# CONFIG_NET is not set
Wenyou Yang3cbbeb12017-04-18 15:28:27 +0800[diff] [blame]36CONFIG_DM=y
37CONFIG_CLK=y
38CONFIG_CLK_AT91=y
Wenyou Yang3cbbeb12017-04-18 15:28:27 +0800[diff] [blame]39CONFIG_DM_GPIO=y
40CONFIG_AT91_GPIO=y
41CONFIG_DM_MMC=y
42CONFIG_GENERIC_ATMEL_MCI=y
Adam Ford9c519182018-07-08 08:11:07 -0500[diff] [blame]43CONFIG_NAND=y
Stefan Roese23b37f92019-08-22 12:28:04 +0200[diff] [blame]44# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
Adam Ford9c519182018-07-08 08:11:07 -0500[diff] [blame]45CONFIG_NAND_ATMEL=y
Wenyou.Yang@microchip.com5d7fd3e2017-07-21 13:40:10 +0800[diff] [blame]46CONFIG_DM_SPI_FLASH=y
47CONFIG_SPI_FLASH=y
48CONFIG_SPI_FLASH_ATMEL=y
49CONFIG_SPI_FLASH_DATAFLASH=y
Wenyou Yang3cbbeb12017-04-18 15:28:27 +0800[diff] [blame]50CONFIG_PINCTRL=y
51CONFIG_PINCTRL_AT91=y
52CONFIG_DM_SERIAL=y
Wenyou Yangde5793e2017-04-18 15:28:29 +0800[diff] [blame]53CONFIG_DEBUG_UART_ATMEL=y
Wenyou Yangde5793e2017-04-18 15:28:29 +0800[diff] [blame]54CONFIG_DEBUG_UART_ANNOUNCE=y
Wenyou Yang3cbbeb12017-04-18 15:28:27 +0800[diff] [blame]55CONFIG_ATMEL_USART=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]56CONFIG_SPI=y
Wenyou.Yang@microchip.com5d7fd3e2017-07-21 13:40:10 +0800[diff] [blame]57CONFIG_DM_SPI=y
Wenyou.Yang@microchip.com272167d2017-08-15 17:40:27 +0800[diff] [blame]58CONFIG_TIMER=y
59CONFIG_ATMEL_PIT_TIMER=y
Simon Glass169bb3b2016-10-17 20:12:56 -0600[diff] [blame]60CONFIG_LCD=y