Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 3814c37f37a48001a66fc02aea2bf945cdd933b2 / . / configs / roc-cc-rk3328_defconfig
blob: 6b3bc75ae95938e6b9f69b71382de619d4912656 [file] [log] [blame]
Chen-Yu Tsai3aa5f1d2020-04-27 14:52:53 +0800[diff] [blame]1CONFIG_ARM=y
Tom Rinie1e85442021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SKIP_LOWLEVEL_INIT=y
Peng Fanc8a61c02022-04-13 17:47:20 +0800[diff] [blame]3CONFIG_COUNTER_FREQUENCY=24000000
Chen-Yu Tsai3aa5f1d2020-04-27 14:52:53 +0800[diff] [blame]4CONFIG_ARCH_ROCKCHIP=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]5CONFIG_TEXT_BASE=0x00200000
Simon Glass035939e2021-07-10 21:14:30 -0600[diff] [blame]6CONFIG_SPL_GPIO=y
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]7CONFIG_NR_DRAM_BANKS=1
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]8CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
9CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
Tom Rinia77d6f82023-05-01 11:50:26 -0400[diff] [blame]10CONFIG_SF_DEFAULT_SPEED=20000000
Chen-Yu Tsai3aa5f1d2020-04-27 14:52:53 +0800[diff] [blame]11CONFIG_ENV_OFFSET=0x3F8000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]12CONFIG_DEFAULT_DEVICE_TREE="rk3328-roc-cc"
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]13CONFIG_DM_RESET=y
Chen-Yu Tsai3aa5f1d2020-04-27 14:52:53 +0800[diff] [blame]14CONFIG_ROCKCHIP_RK3328=y
15CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
16CONFIG_TPL_LIBCOMMON_SUPPORT=y
17CONFIG_TPL_LIBGENERIC_SUPPORT=y
Simon Glass284cb9c2021-07-10 21:14:31 -0600[diff] [blame]18CONFIG_SPL_DRIVERS_MISC=y
Chen-Yu Tsai3aa5f1d2020-04-27 14:52:53 +0800[diff] [blame]19CONFIG_SPL_STACK_R_ADDR=0x600000
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]20CONFIG_SPL_STACK=0x400000
21CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
Chen-Yu Tsai3aa5f1d2020-04-27 14:52:53 +0800[diff] [blame]22CONFIG_DEBUG_UART_BASE=0xFF130000
23CONFIG_DEBUG_UART_CLOCK=24000000
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]24CONFIG_SYS_LOAD_ADDR=0x800800
Chen-Yu Tsai3aa5f1d2020-04-27 14:52:53 +0800[diff] [blame]25CONFIG_DEBUG_UART=y
Chen-Yu Tsai3aa5f1d2020-04-27 14:52:53 +0800[diff] [blame]26# CONFIG_ANDROID_BOOT_IMAGE is not set
27CONFIG_FIT=y
28CONFIG_FIT_VERBOSE=y
29CONFIG_SPL_LOAD_FIT=y
30CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-roc-cc.dtb"
Chen-Yu Tsai3aa5f1d2020-04-27 14:52:53 +0800[diff] [blame]31# CONFIG_DISPLAY_CPUINFO is not set
32CONFIG_DISPLAY_BOARDINFO_LATE=y
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]33CONFIG_MISC_INIT_R=y
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]34CONFIG_SPL_MAX_SIZE=0x40000
35CONFIG_SPL_PAD_TO=0x7f8000
Tom Rini65aa1242022-05-27 10:19:45 -0400[diff] [blame]36CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
37CONFIG_SPL_BSS_START_ADDR=0x2000000
Tom Rini0cb89e72022-05-19 15:09:22 -0400[diff] [blame]38CONFIG_SPL_BSS_MAX_SIZE=0x2000
Chen-Yu Tsai3aa5f1d2020-04-27 14:52:53 +0800[diff] [blame]39# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Tom Rini8a14ac42022-05-26 13:13:21 -0400[diff] [blame]40# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
Chen-Yu Tsai3aa5f1d2020-04-27 14:52:53 +0800[diff] [blame]41CONFIG_SPL_STACK_R=y
Simon Glassbccfc2e2021-07-10 21:14:36 -0600[diff] [blame]42CONFIG_SPL_I2C=y
Simon Glasse91ac4c2021-07-10 21:14:24 -0600[diff] [blame]43CONFIG_SPL_POWER=y
Chen-Yu Tsai3aa5f1d2020-04-27 14:52:53 +0800[diff] [blame]44CONFIG_SPL_ATF=y
45CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
Tom Rini2c3c2822022-06-06 12:13:29 -0400[diff] [blame]46CONFIG_TPL_SYS_MALLOC_SIMPLE=y
Chen-Yu Tsai3aa5f1d2020-04-27 14:52:53 +0800[diff] [blame]47CONFIG_CMD_BOOTZ=y
48CONFIG_CMD_GPT=y
49CONFIG_CMD_MMC=y
50CONFIG_CMD_USB=y
Leonidas-Panagiotis Papadakosbbb9c312022-03-14 18:51:49 +0200[diff] [blame]51CONFIG_CMD_USB_MASS_STORAGE=y
Chen-Yu Tsai3aa5f1d2020-04-27 14:52:53 +0800[diff] [blame]52# CONFIG_CMD_SETEXPR is not set
53CONFIG_CMD_TIME=y
54CONFIG_SPL_OF_CONTROL=y
55CONFIG_TPL_OF_CONTROL=y
Chen-Yu Tsai3aa5f1d2020-04-27 14:52:53 +0800[diff] [blame]56CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
57CONFIG_TPL_OF_PLATDATA=y
58CONFIG_ENV_IS_IN_MMC=y
59CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rinieb1f9092020-07-24 17:14:47 -0400[diff] [blame]60CONFIG_SYS_MMC_ENV_DEV=1
Chen-Yu Tsai3aa5f1d2020-04-27 14:52:53 +0800[diff] [blame]61CONFIG_NET_RANDOM_ETHADDR=y
62CONFIG_TPL_DM=y
63CONFIG_REGMAP=y
64CONFIG_SPL_REGMAP=y
65CONFIG_TPL_REGMAP=y
66CONFIG_SYSCON=y
67CONFIG_SPL_SYSCON=y
68CONFIG_TPL_SYSCON=y
69CONFIG_CLK=y
70CONFIG_SPL_CLK=y
71CONFIG_FASTBOOT_BUF_ADDR=0x800800
72CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
73CONFIG_ROCKCHIP_GPIO=y
74CONFIG_SYS_I2C_ROCKCHIP=y
75CONFIG_MMC_DW=y
76CONFIG_MMC_DW_ROCKCHIP=y
Chen-Yu Tsai3aa5f1d2020-04-27 14:52:53 +0800[diff] [blame]77CONFIG_PHY_REALTEK=y
Chen-Yu Tsai3aa5f1d2020-04-27 14:52:53 +0800[diff] [blame]78CONFIG_PHY_GIGE=y
79CONFIG_ETH_DESIGNWARE=y
80CONFIG_GMAC_ROCKCHIP=y
81CONFIG_PINCTRL=y
82CONFIG_SPL_PINCTRL=y
83CONFIG_DM_PMIC=y
84CONFIG_PMIC_RK8XX=y
Simon Glass6343ffb2021-08-08 12:20:25 -0600[diff] [blame]85CONFIG_SPL_PMIC_RK8XX=y
Chen-Yu Tsai3aa5f1d2020-04-27 14:52:53 +0800[diff] [blame]86CONFIG_SPL_DM_REGULATOR=y
87CONFIG_REGULATOR_PWM=y
88CONFIG_DM_REGULATOR_FIXED=y
89CONFIG_SPL_DM_REGULATOR_FIXED=y
90CONFIG_DM_REGULATOR_GPIO=y
91CONFIG_REGULATOR_RK8XX=y
92CONFIG_PWM_ROCKCHIP=y
93CONFIG_RAM=y
94CONFIG_SPL_RAM=y
95CONFIG_TPL_RAM=y
Chen-Yu Tsai3aa5f1d2020-04-27 14:52:53 +0800[diff] [blame]96CONFIG_BAUDRATE=1500000
97CONFIG_DEBUG_UART_SHIFT=2
Tom Rinidc172ee2022-12-04 09:39:03 -0500[diff] [blame]98CONFIG_SYS_NS16550_MEM32=y
Tom Rini4c66e9a2020-11-09 14:23:01 -0500[diff] [blame]99CONFIG_SYSINFO=y
100CONFIG_SYSINFO_SMBIOS=y
Chen-Yu Tsai3aa5f1d2020-04-27 14:52:53 +0800[diff] [blame]101CONFIG_SYSRESET=y
102# CONFIG_TPL_SYSRESET is not set
103CONFIG_USB=y
104CONFIG_USB_XHCI_HCD=y
105CONFIG_USB_XHCI_DWC3=y
106CONFIG_USB_EHCI_HCD=y
107CONFIG_USB_EHCI_GENERIC=y
108CONFIG_USB_OHCI_HCD=y
109CONFIG_USB_OHCI_GENERIC=y
110CONFIG_USB_DWC2=y
111CONFIG_USB_DWC3=y
112# CONFIG_USB_DWC3_GADGET is not set
113CONFIG_USB_GADGET=y
114CONFIG_USB_GADGET_DWC2_OTG=y
115CONFIG_SPL_TINY_MEMSET=y
116CONFIG_TPL_TINY_MEMSET=y
117CONFIG_ERRNO_STR=y