blob: 1a8321b0e4064d9c7f780b18e72d72cd286b2528 [file] [log] [blame]
York Sun56cc3db2014-09-08 12:20:00 -07001/*
Mingkai Hu0e58b512015-10-26 19:47:50 +08002 * Copyright 2014-2015 Freescale Semiconductor, Inc.
York Sun56cc3db2014-09-08 12:20:00 -07003 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <libfdt.h>
9#include <fdt_support.h>
Mingkai Hu0e58b512015-10-26 19:47:50 +080010#include <phy.h>
11#ifdef CONFIG_FSL_LSCH3
12#include <asm/arch/fdt.h>
13#endif
Yangbo Lud0e295d2015-03-20 19:28:31 -070014#ifdef CONFIG_FSL_ESDHC
15#include <fsl_esdhc.h>
16#endif
Qianyu Gong4026f662016-02-18 13:02:02 +080017#ifdef CONFIG_SYS_DPAA_FMAN
18#include <fsl_fman.h>
19#endif
Mingkai Hu0e58b512015-10-26 19:47:50 +080020#ifdef CONFIG_MP
21#include <asm/arch/mp.h>
22#endif
Alex Porosanu16286bb2016-04-11 10:42:50 +030023#include <fsl_sec.h>
24#include <asm/arch-fsl-layerscape/soc.h>
Hou Zhiqiang21c4d552016-06-28 20:18:15 +080025#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
26#include <asm/armv8/sec_firmware.h>
27#endif
York Sun56cc3db2014-09-08 12:20:00 -070028
Shaohui Xie04643262015-10-26 19:47:54 +080029int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
30{
31 return fdt_setprop_string(blob, offset, "phy-connection-type",
32 phy_string_for_interface(phyc));
33}
34
York Sun56cc3db2014-09-08 12:20:00 -070035#ifdef CONFIG_MP
36void ft_fixup_cpu(void *blob)
37{
38 int off;
39 __maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr();
40 fdt32_t *reg;
41 int addr_cells;
Arnab Basu0cb19422015-01-06 13:18:41 -080042 u64 val, core_id;
York Sun56cc3db2014-09-08 12:20:00 -070043 size_t *boot_code_size = &(__secondary_boot_code_size);
Hou Zhiqiang21c4d552016-06-28 20:18:15 +080044#if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && defined(CONFIG_ARMV8_PSCI)
45 int node;
46 u32 psci_ver;
47
48 /* Check the psci version to determine if the psci is supported */
49 psci_ver = sec_firmware_support_psci_version();
50 if (psci_ver == 0xffffffff) {
51 /* remove psci DT node */
52 node = fdt_path_offset(blob, "/psci");
53 if (node >= 0)
54 goto remove_psci_node;
55
56 node = fdt_node_offset_by_compatible(blob, -1, "arm,psci");
57 if (node >= 0)
58 goto remove_psci_node;
59
60 node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-0.2");
61 if (node >= 0)
62 goto remove_psci_node;
63
64 node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-1.0");
65 if (node >= 0)
66 goto remove_psci_node;
York Sun56cc3db2014-09-08 12:20:00 -070067
Hou Zhiqiang21c4d552016-06-28 20:18:15 +080068remove_psci_node:
69 if (node >= 0)
70 fdt_del_node(blob, node);
71 } else {
72 return;
73 }
74#endif
York Sun56cc3db2014-09-08 12:20:00 -070075 off = fdt_path_offset(blob, "/cpus");
76 if (off < 0) {
77 puts("couldn't find /cpus node\n");
78 return;
79 }
80 of_bus_default_count_cells(blob, off, &addr_cells, NULL);
81
82 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
83 while (off != -FDT_ERR_NOTFOUND) {
84 reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
85 if (reg) {
Alison Wanga978fc12015-09-01 10:47:27 +080086 core_id = of_read_number(reg, addr_cells);
Arnab Basu0cb19422015-01-06 13:18:41 -080087 if (core_id == 0 || (is_core_online(core_id))) {
88 val = spin_tbl_addr;
89 val += id_to_core(core_id) *
90 SPIN_TABLE_ELEM_SIZE;
91 val = cpu_to_fdt64(val);
92 fdt_setprop_string(blob, off, "enable-method",
93 "spin-table");
94 fdt_setprop(blob, off, "cpu-release-addr",
95 &val, sizeof(val));
96 } else {
97 debug("skipping offline core\n");
98 }
York Sun56cc3db2014-09-08 12:20:00 -070099 } else {
100 puts("Warning: found cpu node without reg property\n");
101 }
102 off = fdt_node_offset_by_prop_value(blob, off, "device_type",
103 "cpu", 4);
104 }
105
106 fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code,
107 *boot_code_size);
108}
109#endif
110
Sriram Dashf92c2cb2016-10-03 16:24:46 +0530111void fsl_fdt_disable_usb(void *blob)
112{
113 int off;
114 /*
115 * SYSCLK is used as a reference clock for USB. When the USB
116 * controller is used, SYSCLK must meet the additional requirement
117 * of 100 MHz.
118 */
119 if (CONFIG_SYS_CLK_FREQ != 100000000) {
120 off = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3");
121 while (off != -FDT_ERR_NOTFOUND) {
122 fdt_status_disabled(blob, off);
123 off = fdt_node_offset_by_compatible(blob, off,
124 "snps,dwc3");
125 }
126 }
127}
128
York Sun56cc3db2014-09-08 12:20:00 -0700129void ft_cpu_setup(void *blob, bd_t *bd)
130{
Alex Porosanu16286bb2016-04-11 10:42:50 +0300131#ifdef CONFIG_FSL_LSCH2
132 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
133 unsigned int svr = in_be32(&gur->svr);
134
135 /* delete crypto node if not on an E-processor */
136 if (!IS_E_PROCESSOR(svr))
137 fdt_fixup_crypto_node(blob, 0);
138#if CONFIG_SYS_FSL_SEC_COMPAT >= 4
139 else {
140 ccsr_sec_t __iomem *sec;
141
142 sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
143 fdt_fixup_crypto_node(blob, sec_in32(&sec->secvid_ms));
144 }
145#endif
146#endif
147
York Sun56cc3db2014-09-08 12:20:00 -0700148#ifdef CONFIG_MP
149 ft_fixup_cpu(blob);
150#endif
Bhupesh Sharmac7710402015-01-06 13:18:44 -0800151
152#ifdef CONFIG_SYS_NS16550
Scott Wood3e7fd6f2015-03-20 19:28:14 -0700153 do_fixup_by_compat_u32(blob, "fsl,ns16550",
Bhupesh Sharmac7710402015-01-06 13:18:44 -0800154 "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
155#endif
Yangbo Lud0e295d2015-03-20 19:28:31 -0700156
Prabhakar Kushwaha53d1cdc2015-12-24 17:25:06 +0530157 do_fixup_by_compat_u32(blob, "fixed-clock",
158 "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
159
Prabhakar Kushwaha940a3162015-05-28 14:53:59 +0530160#ifdef CONFIG_PCI
161 ft_pci_setup(blob, bd);
162#endif
163
Mingkai Hu0e58b512015-10-26 19:47:50 +0800164#ifdef CONFIG_FSL_ESDHC
Yangbo Lud0e295d2015-03-20 19:28:31 -0700165 fdt_fixup_esdhc(blob, bd);
166#endif
Stuart Yodereaea5042015-07-02 11:29:04 +0530167
Qianyu Gong4026f662016-02-18 13:02:02 +0800168#ifdef CONFIG_SYS_DPAA_FMAN
169 fdt_fixup_fman_firmware(blob);
170#endif
Sriram Dashf92c2cb2016-10-03 16:24:46 +0530171 fsl_fdt_disable_usb(blob);
172
York Sun56cc3db2014-09-08 12:20:00 -0700173}