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Stelian Pop7d42a222008-01-31 21:15:53 +00001/*
2 * (C) Copyright 2007
Stelian Pop5ee0c7f2011-11-01 00:00:39 +01003 * Stelian Pop <stelian@popies.net>
Stelian Pop7d42a222008-01-31 21:15:53 +00004 * Lead Tech Design <www.leadtechdesign.com>
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +02005 * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Stelian Pop7d42a222008-01-31 21:15:53 +00006 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25#ifndef __ASM_ARM_ARCH_CLK_H__
26#define __ASM_ARM_ARCH_CLK_H__
27
28#include <asm/arch/hardware.h>
Andreas Bießmannf4c9f922011-06-12 01:49:11 +000029#include <asm/global_data.h>
30
31static inline unsigned long get_cpu_clk_rate(void)
32{
33 DECLARE_GLOBAL_DATA_PTR;
Simon Glasse61accc2012-12-13 20:48:31 +000034 return gd->arch.cpu_clk_rate_hz;
Andreas Bießmannf4c9f922011-06-12 01:49:11 +000035}
36
37static inline unsigned long get_main_clk_rate(void)
38{
39 DECLARE_GLOBAL_DATA_PTR;
Simon Glasse61accc2012-12-13 20:48:31 +000040 return gd->arch.main_clk_rate_hz;
Andreas Bießmannf4c9f922011-06-12 01:49:11 +000041}
42
43static inline unsigned long get_mck_clk_rate(void)
44{
45 DECLARE_GLOBAL_DATA_PTR;
Simon Glasse61accc2012-12-13 20:48:31 +000046 return gd->arch.mck_rate_hz;
Andreas Bießmannf4c9f922011-06-12 01:49:11 +000047}
48
49static inline unsigned long get_plla_clk_rate(void)
50{
51 DECLARE_GLOBAL_DATA_PTR;
Simon Glasse61accc2012-12-13 20:48:31 +000052 return gd->arch.plla_rate_hz;
Andreas Bießmannf4c9f922011-06-12 01:49:11 +000053}
54
55static inline unsigned long get_pllb_clk_rate(void)
56{
57 DECLARE_GLOBAL_DATA_PTR;
Simon Glasse61accc2012-12-13 20:48:31 +000058 return gd->arch.pllb_rate_hz;
Andreas Bießmannf4c9f922011-06-12 01:49:11 +000059}
Stelian Pop7d42a222008-01-31 21:15:53 +000060
Andreas Bießmannf4c9f922011-06-12 01:49:11 +000061static inline u32 get_pllb_init(void)
62{
63 DECLARE_GLOBAL_DATA_PTR;
Simon Glasse61accc2012-12-13 20:48:31 +000064 return gd->arch.at91_pllb_usb_init;
Andreas Bießmannf4c9f922011-06-12 01:49:11 +000065}
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +020066
Stelian Pop7d42a222008-01-31 21:15:53 +000067static inline unsigned long get_macb_pclk_rate(unsigned int dev_id)
68{
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +020069 return get_mck_clk_rate();
Stelian Pop7d42a222008-01-31 21:15:53 +000070}
71
72static inline unsigned long get_usart_clk_rate(unsigned int dev_id)
73{
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +020074 return get_mck_clk_rate();
Stelian Pop7d42a222008-01-31 21:15:53 +000075}
76
Stelian Popf6f86652008-05-09 21:57:18 +020077static inline unsigned long get_lcdc_clk_rate(unsigned int dev_id)
78{
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +020079 return get_mck_clk_rate();
Stelian Popf6f86652008-05-09 21:57:18 +020080}
81
Sedji Gaouaou538566d2009-07-09 10:16:29 +020082static inline unsigned long get_spi_clk_rate(unsigned int dev_id)
83{
84 return get_mck_clk_rate();
85}
86
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +020087static inline unsigned long get_twi_clk_rate(unsigned int dev_id)
88{
89 return get_mck_clk_rate();
90}
Stelian Popf6f86652008-05-09 21:57:18 +020091
Reinhard Meyerc718a562010-08-13 10:31:06 +020092static inline unsigned long get_mci_clk_rate(void)
93{
94 return get_mck_clk_rate();
95}
96
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +020097int at91_clock_init(unsigned long main_clock);
Stelian Pop7d42a222008-01-31 21:15:53 +000098#endif /* __ASM_ARM_ARCH_CLK_H__ */