Stelian Pop | 7d42a22 | 2008-01-31 21:15:53 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2007 |
Stelian Pop | 5ee0c7f | 2011-11-01 00:00:39 +0100 | [diff] [blame] | 3 | * Stelian Pop <stelian@popies.net> |
Stelian Pop | 7d42a22 | 2008-01-31 21:15:53 +0000 | [diff] [blame] | 4 | * Lead Tech Design <www.leadtechdesign.com> |
Jean-Christophe PLAGNIOL-VILLARD | 23164f1 | 2009-04-16 21:30:44 +0200 | [diff] [blame] | 5 | * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
Stelian Pop | 7d42a22 | 2008-01-31 21:15:53 +0000 | [diff] [blame] | 6 | * |
| 7 | * See file CREDITS for list of people who contributed to this |
| 8 | * project. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License as |
| 12 | * published by the Free Software Foundation; either version 2 of |
| 13 | * the License, or (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 23 | * MA 02111-1307 USA |
| 24 | */ |
| 25 | #ifndef __ASM_ARM_ARCH_CLK_H__ |
| 26 | #define __ASM_ARM_ARCH_CLK_H__ |
| 27 | |
| 28 | #include <asm/arch/hardware.h> |
Andreas Bießmann | f4c9f92 | 2011-06-12 01:49:11 +0000 | [diff] [blame] | 29 | #include <asm/global_data.h> |
| 30 | |
| 31 | static inline unsigned long get_cpu_clk_rate(void) |
| 32 | { |
| 33 | DECLARE_GLOBAL_DATA_PTR; |
Simon Glass | e61accc | 2012-12-13 20:48:31 +0000 | [diff] [blame] | 34 | return gd->arch.cpu_clk_rate_hz; |
Andreas Bießmann | f4c9f92 | 2011-06-12 01:49:11 +0000 | [diff] [blame] | 35 | } |
| 36 | |
| 37 | static inline unsigned long get_main_clk_rate(void) |
| 38 | { |
| 39 | DECLARE_GLOBAL_DATA_PTR; |
Simon Glass | e61accc | 2012-12-13 20:48:31 +0000 | [diff] [blame] | 40 | return gd->arch.main_clk_rate_hz; |
Andreas Bießmann | f4c9f92 | 2011-06-12 01:49:11 +0000 | [diff] [blame] | 41 | } |
| 42 | |
| 43 | static inline unsigned long get_mck_clk_rate(void) |
| 44 | { |
| 45 | DECLARE_GLOBAL_DATA_PTR; |
Simon Glass | e61accc | 2012-12-13 20:48:31 +0000 | [diff] [blame] | 46 | return gd->arch.mck_rate_hz; |
Andreas Bießmann | f4c9f92 | 2011-06-12 01:49:11 +0000 | [diff] [blame] | 47 | } |
| 48 | |
| 49 | static inline unsigned long get_plla_clk_rate(void) |
| 50 | { |
| 51 | DECLARE_GLOBAL_DATA_PTR; |
Simon Glass | e61accc | 2012-12-13 20:48:31 +0000 | [diff] [blame] | 52 | return gd->arch.plla_rate_hz; |
Andreas Bießmann | f4c9f92 | 2011-06-12 01:49:11 +0000 | [diff] [blame] | 53 | } |
| 54 | |
| 55 | static inline unsigned long get_pllb_clk_rate(void) |
| 56 | { |
| 57 | DECLARE_GLOBAL_DATA_PTR; |
Simon Glass | e61accc | 2012-12-13 20:48:31 +0000 | [diff] [blame] | 58 | return gd->arch.pllb_rate_hz; |
Andreas Bießmann | f4c9f92 | 2011-06-12 01:49:11 +0000 | [diff] [blame] | 59 | } |
Stelian Pop | 7d42a22 | 2008-01-31 21:15:53 +0000 | [diff] [blame] | 60 | |
Andreas Bießmann | f4c9f92 | 2011-06-12 01:49:11 +0000 | [diff] [blame] | 61 | static inline u32 get_pllb_init(void) |
| 62 | { |
| 63 | DECLARE_GLOBAL_DATA_PTR; |
Simon Glass | e61accc | 2012-12-13 20:48:31 +0000 | [diff] [blame] | 64 | return gd->arch.at91_pllb_usb_init; |
Andreas Bießmann | f4c9f92 | 2011-06-12 01:49:11 +0000 | [diff] [blame] | 65 | } |
Jean-Christophe PLAGNIOL-VILLARD | 23164f1 | 2009-04-16 21:30:44 +0200 | [diff] [blame] | 66 | |
Stelian Pop | 7d42a22 | 2008-01-31 21:15:53 +0000 | [diff] [blame] | 67 | static inline unsigned long get_macb_pclk_rate(unsigned int dev_id) |
| 68 | { |
Jean-Christophe PLAGNIOL-VILLARD | 23164f1 | 2009-04-16 21:30:44 +0200 | [diff] [blame] | 69 | return get_mck_clk_rate(); |
Stelian Pop | 7d42a22 | 2008-01-31 21:15:53 +0000 | [diff] [blame] | 70 | } |
| 71 | |
| 72 | static inline unsigned long get_usart_clk_rate(unsigned int dev_id) |
| 73 | { |
Jean-Christophe PLAGNIOL-VILLARD | 23164f1 | 2009-04-16 21:30:44 +0200 | [diff] [blame] | 74 | return get_mck_clk_rate(); |
Stelian Pop | 7d42a22 | 2008-01-31 21:15:53 +0000 | [diff] [blame] | 75 | } |
| 76 | |
Stelian Pop | f6f8665 | 2008-05-09 21:57:18 +0200 | [diff] [blame] | 77 | static inline unsigned long get_lcdc_clk_rate(unsigned int dev_id) |
| 78 | { |
Jean-Christophe PLAGNIOL-VILLARD | 23164f1 | 2009-04-16 21:30:44 +0200 | [diff] [blame] | 79 | return get_mck_clk_rate(); |
Stelian Pop | f6f8665 | 2008-05-09 21:57:18 +0200 | [diff] [blame] | 80 | } |
| 81 | |
Sedji Gaouaou | 538566d | 2009-07-09 10:16:29 +0200 | [diff] [blame] | 82 | static inline unsigned long get_spi_clk_rate(unsigned int dev_id) |
| 83 | { |
| 84 | return get_mck_clk_rate(); |
| 85 | } |
| 86 | |
Jean-Christophe PLAGNIOL-VILLARD | 23164f1 | 2009-04-16 21:30:44 +0200 | [diff] [blame] | 87 | static inline unsigned long get_twi_clk_rate(unsigned int dev_id) |
| 88 | { |
| 89 | return get_mck_clk_rate(); |
| 90 | } |
Stelian Pop | f6f8665 | 2008-05-09 21:57:18 +0200 | [diff] [blame] | 91 | |
Reinhard Meyer | c718a56 | 2010-08-13 10:31:06 +0200 | [diff] [blame] | 92 | static inline unsigned long get_mci_clk_rate(void) |
| 93 | { |
| 94 | return get_mck_clk_rate(); |
| 95 | } |
| 96 | |
Jean-Christophe PLAGNIOL-VILLARD | 23164f1 | 2009-04-16 21:30:44 +0200 | [diff] [blame] | 97 | int at91_clock_init(unsigned long main_clock); |
Stelian Pop | 7d42a22 | 2008-01-31 21:15:53 +0000 | [diff] [blame] | 98 | #endif /* __ASM_ARM_ARCH_CLK_H__ */ |