| Cyril Chemparathy | 3d13806 | 2010-06-07 14:13:36 -0400 | [diff] [blame] | 1 | /* |
| 2 | * TNETV107X-EVM: Board initialization |
| 3 | * |
| 4 | * See file CREDITS for list of people who contributed to this |
| 5 | * project. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 20 | */ |
| 21 | |
| 22 | #include <common.h> |
| 23 | #include <miiphy.h> |
| 24 | #include <linux/mtd/nand.h> |
| 25 | #include <asm/arch/hardware.h> |
| 26 | #include <asm/arch/clock.h> |
| 27 | #include <asm/io.h> |
| 28 | #include <asm/mach-types.h> |
| 29 | #include <asm/arch/nand_defs.h> |
| 30 | #include <asm/arch/mux.h> |
| 31 | |
| 32 | DECLARE_GLOBAL_DATA_PTR; |
| 33 | |
| 34 | static struct async_emif_config async_emif_config[ASYNC_EMIF_NUM_CS] = { |
| 35 | { /* CS0 */ |
| 36 | .mode = ASYNC_EMIF_MODE_NAND, |
| 37 | .wr_setup = 5, |
| 38 | .wr_strobe = 5, |
| 39 | .wr_hold = 2, |
| 40 | .rd_setup = 5, |
| 41 | .rd_strobe = 5, |
| 42 | .rd_hold = 2, |
| 43 | .turn_around = 5, |
| 44 | .width = ASYNC_EMIF_8, |
| 45 | }, |
| 46 | { /* CS1 */ |
| 47 | .mode = ASYNC_EMIF_MODE_NOR, |
| 48 | .wr_setup = 2, |
| 49 | .wr_strobe = 27, |
| 50 | .wr_hold = 4, |
| 51 | .rd_setup = 2, |
| 52 | .rd_strobe = 27, |
| 53 | .rd_hold = 4, |
| 54 | .turn_around = 2, |
| 55 | .width = ASYNC_EMIF_PRESERVE, |
| 56 | }, |
| 57 | { /* CS2 */ |
| 58 | .mode = ASYNC_EMIF_MODE_NOR, |
| 59 | .wr_setup = 2, |
| 60 | .wr_strobe = 27, |
| 61 | .wr_hold = 4, |
| 62 | .rd_setup = 2, |
| 63 | .rd_strobe = 27, |
| 64 | .rd_hold = 4, |
| 65 | .turn_around = 2, |
| 66 | .width = ASYNC_EMIF_PRESERVE, |
| 67 | }, |
| 68 | { /* CS3 */ |
| 69 | .mode = ASYNC_EMIF_MODE_NOR, |
| 70 | .wr_setup = 1, |
| 71 | .wr_strobe = 90, |
| 72 | .wr_hold = 3, |
| 73 | .rd_setup = 1, |
| 74 | .rd_strobe = 26, |
| 75 | .rd_hold = 3, |
| 76 | .turn_around = 1, |
| 77 | .width = ASYNC_EMIF_8, |
| 78 | }, |
| 79 | }; |
| 80 | |
| 81 | static struct pll_init_data pll_config[] = { |
| 82 | { |
| 83 | .pll = ETH_PLL, |
| 84 | .internal_osc = 1, |
| 85 | .pll_freq = 500000000, |
| 86 | .div_freq = { |
| 87 | 5000000, 50000000, 125000000, 250000000, 25000000, |
| 88 | }, |
| 89 | }, |
| 90 | }; |
| 91 | |
| 92 | static const short sdio1_pins[] = { |
| 93 | TNETV107X_PIN_SDIO1_CLK_1, TNETV107X_PIN_SDIO1_CMD_1, |
| 94 | TNETV107X_PIN_SDIO1_DATA0_1, TNETV107X_PIN_SDIO1_DATA1_1, |
| 95 | TNETV107X_PIN_SDIO1_DATA2_1, TNETV107X_PIN_SDIO1_DATA3_1, |
| 96 | -1 |
| 97 | }; |
| 98 | |
| 99 | static const short uart1_pins[] = { |
| 100 | TNETV107X_PIN_UART1_RD, TNETV107X_PIN_UART1_TD, -1 |
| 101 | }; |
| 102 | |
| 103 | static const short ssp_pins[] = { |
| 104 | TNETV107X_PIN_SSP0_0, TNETV107X_PIN_SSP0_1, TNETV107X_PIN_SSP0_2, |
| 105 | TNETV107X_PIN_SSP1_0, TNETV107X_PIN_SSP1_1, TNETV107X_PIN_SSP1_2, |
| 106 | TNETV107X_PIN_SSP1_3, -1 |
| 107 | }; |
| 108 | |
| 109 | int board_init(void) |
| 110 | { |
| 111 | #ifndef CONFIG_USE_IRQ |
| 112 | __raw_writel(0, INTC_GLB_EN); /* Global disable */ |
| 113 | __raw_writel(0, INTC_HINT_EN); /* Disable host ints */ |
| 114 | __raw_writel(0, INTC_EN_CLR0 + 0); /* Clear enable */ |
| 115 | __raw_writel(0, INTC_EN_CLR0 + 4); /* Clear enable */ |
| 116 | __raw_writel(0, INTC_EN_CLR0 + 8); /* Clear enable */ |
| 117 | #endif |
| 118 | |
| 119 | gd->bd->bi_arch_number = MACH_TYPE_TNETV107X; |
| 120 | gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; |
| 121 | |
| 122 | init_plls(ARRAY_SIZE(pll_config), pll_config); |
| 123 | |
| 124 | init_async_emif(ARRAY_SIZE(async_emif_config), async_emif_config); |
| 125 | |
| 126 | mux_select_pin(TNETV107X_PIN_ASR_CS3); |
| 127 | mux_select_pins(sdio1_pins); |
| 128 | mux_select_pins(uart1_pins); |
| 129 | mux_select_pins(ssp_pins); |
| 130 | |
| 131 | return 0; |
| 132 | } |
| 133 | |
| 134 | int dram_init(void) |
| 135 | { |
| 136 | gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
| 137 | gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; |
| 138 | |
| 139 | return 0; |
| 140 | } |
| 141 | |
| 142 | #ifdef CONFIG_NAND_DAVINCI |
| 143 | int board_nand_init(struct nand_chip *nand) |
| 144 | { |
| 145 | davinci_nand_init(nand); |
| 146 | |
| 147 | return 0; |
| 148 | } |
| 149 | #endif |