| Wenyou Yang | 35736f5 | 2017-03-24 09:18:41 +0800 | [diff] [blame] | 1 | /* |
| 2 | * sama5d3_mci2.dtsi - Device Tree Include file for SAMA5D3 SoC with |
| 3 | * 3 MMC ports |
| 4 | * |
| 5 | * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> |
| 6 | * |
| 7 | * Licensed under GPLv2. |
| 8 | */ |
| 9 | |
| 10 | #include <dt-bindings/pinctrl/at91.h> |
| 11 | #include <dt-bindings/interrupt-controller/irq.h> |
| 12 | #include <dt-bindings/clock/at91.h> |
| 13 | |
| 14 | / { |
| 15 | ahb { |
| 16 | apb { |
| 17 | pinctrl@fffff200 { |
| 18 | mmc2 { |
| 19 | pinctrl_mmc2_clk_cmd_dat0: mmc2_clk_cmd_dat0 { |
| 20 | atmel,pins = |
| 21 | <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A MCI2_CK, conflicts with PCK2 */ |
| 22 | AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC10 periph A MCI2_CDA with pullup */ |
| 23 | AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC11 periph A MCI2_DA0 with pullup */ |
| 24 | }; |
| 25 | pinctrl_mmc2_dat1_3: mmc2_dat1_3 { |
| 26 | atmel,pins = |
| 27 | <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC12 periph A MCI2_DA1 with pullup, conflicts with TIOA1 */ |
| 28 | AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC13 periph A MCI2_DA2 with pullup, conflicts with TIOB1 */ |
| 29 | AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC14 periph A MCI2_DA3 with pullup, conflicts with TCLK1 */ |
| 30 | }; |
| 31 | }; |
| 32 | }; |
| 33 | |
| 34 | pmc: pmc@fffffc00 { |
| 35 | periphck { |
| 36 | mci2_clk: mci2_clk@23 { |
| 37 | #clock-cells = <0>; |
| 38 | reg = <23>; |
| 39 | }; |
| 40 | }; |
| 41 | }; |
| 42 | |
| 43 | mmc2: mmc@f8004000 { |
| 44 | compatible = "atmel,hsmci"; |
| 45 | reg = <0xf8004000 0x600>; |
| 46 | interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>; |
| 47 | dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(1)>; |
| 48 | dma-names = "rxtx"; |
| 49 | pinctrl-names = "default"; |
| 50 | pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>; |
| 51 | clocks = <&mci2_clk>; |
| 52 | clock-names = "mci_clk"; |
| 53 | status = "disabled"; |
| 54 | #address-cells = <1>; |
| 55 | #size-cells = <0>; |
| 56 | }; |
| 57 | }; |
| 58 | }; |
| 59 | }; |