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git01.mediatek.com / filogic / uboot / 370e11ca33fc65a243e11209ef74aa4278ea98cf / . / include / configs / mx6_common.h
blob: 245530aa640b846e083f9ccd31c419919a0afe8d [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0 */
Stephen Warren57ab23f2013-02-26 12:28:29 +0000[diff] [blame]2/*
3 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
Stephen Warren57ab23f2013-02-26 12:28:29 +0000[diff] [blame]4 */
5
6#ifndef __MX6_COMMON_H
7#define __MX6_COMMON_H
8
Simon Glassfb64e362020-05-10 11:40:09 -0600[diff] [blame]9#include <linux/stringify.h>
10
Stefan Agnerbe8b7c52018-01-05 15:08:19 +0100[diff] [blame]11#if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
12#define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */
Stefan Agnerbe8b7c52018-01-05 15:08:19 +0100[diff] [blame]13#else
Fabio Estevam13409292014-01-29 17:39:49 -0200[diff] [blame]14#ifndef CONFIG_SYS_L2CACHE_OFF
Tom Rini6a5dccc2022-11-16 13:10:41 -0500[diff] [blame]15#define CFG_SYS_PL310_BASE L2_PL310_BASE
Fabio Estevam13409292014-01-29 17:39:49 -0200[diff] [blame]16#endif
17
Peng Fand2d4fcb2015-07-20 19:28:26 +0800[diff] [blame]18#endif
Ye.Li2b7f8772014-10-30 18:20:59 +0800[diff] [blame]19#define CONFIG_MXC_GPT_HCLK
Gabriel Huau170ceaf2014-07-26 11:35:43 -0700[diff] [blame]20
Peter Robinson4b671502015-05-22 17:30:45 +0100[diff] [blame]21#include <linux/sizes.h>
22#include <asm/arch/imx-regs.h>
Stefano Babic33731bc2017-06-29 10:16:06 +0200[diff] [blame]23#include <asm/mach-imx/gpio.h>
Peter Robinson4b671502015-05-22 17:30:45 +0100[diff] [blame]24
Peter Robinson61a1b9d2015-05-22 17:30:50 +0100[diff] [blame]25/* Miscellaneous configurable options */
Peter Robinson61a1b9d2015-05-22 17:30:50 +0100[diff] [blame]26
Peter Robinsonbe6c5f12015-05-22 17:30:52 +0100[diff] [blame]27/* MMC */
Peter Robinsonbe6c5f12015-05-22 17:30:52 +0100[diff] [blame]28
Stephen Warren57ab23f2013-02-26 12:28:29 +0000[diff] [blame]29#endif