blob: cd806cb698e941263e2fd8ebcd931de403c3263e [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Patrick Bruennba81b042016-11-04 11:57:02 +01002/*
3 * Copyright (C) 2015 Beckhoff Automation GmbH & Co. KG
4 * Patrick Bruenn <p.bruenn@beckhoff.com>
5 *
6 * Configuration settings for Beckhoff CX9020.
7 *
8 * Based on Freescale's Linux i.MX mx53loco.h file:
9 * Copyright (C) 2010-2011 Freescale Semiconductor.
Patrick Bruennba81b042016-11-04 11:57:02 +010010 */
11
12#ifndef __CONFIG_H
13#define __CONFIG_H
14
15#include <asm/arch/imx-regs.h>
16
Patrick Bruennba81b042016-11-04 11:57:02 +010017#define CONFIG_MXC_UART_BASE UART2_BASE
18
Patrick Bruennba81b042016-11-04 11:57:02 +010019/* MMC Configs */
Tom Rini376b88a2022-10-28 20:27:13 -040020#define CFG_SYS_FSL_ESDHC_ADDR 0
Patrick Bruennba81b042016-11-04 11:57:02 +010021
Patrick Bruennba81b042016-11-04 11:57:02 +010022/* bootz: zImage/initrd.img support */
Patrick Bruennba81b042016-11-04 11:57:02 +010023
Patrick Bruennba81b042016-11-04 11:57:02 +010024
25/* USB Configs */
Patrick Bruennba81b042016-11-04 11:57:02 +010026#define CONFIG_MXC_USB_PORT 1
27#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
28#define CONFIG_MXC_USB_FLAGS 0
29
Patrick Bruennba81b042016-11-04 11:57:02 +010030/* Command definition */
Patrick Bruennba81b042016-11-04 11:57:02 +010031
Steffen Dirkwinkelab0ed602019-10-23 07:40:43 +020032#define BOOT_TARGET_DEVICES(func) \
33 func(MMC, mmc, 0) \
34 func(MMC, mmc, 1) \
35 func(USB, usb, 0) \
36 func(PXE, pxe, na)
37
38#include <config_distro_bootcmd.h>
39
Patrick Bruennba81b042016-11-04 11:57:02 +010040#define CONFIG_EXTRA_ENV_SETTINGS \
Steffen Dirkwinkelab0ed602019-10-23 07:40:43 +020041 "fdt_addr_r=0x75000000\0" \
Patrick Bruenn2ef943e2017-07-11 11:23:21 +020042 "pxefile_addr_r=0x73000000\0" \
Steffen Dirkwinkelab0ed602019-10-23 07:40:43 +020043 "scriptaddr=0x74000000\0" \
44 "ramdisk_addr_r=0x80000000\0" \
45 "kernel_addr_r=0x72000000\0" \
46 "fdt_high=0xffffffff\0" \
Patrick Bruennba81b042016-11-04 11:57:02 +010047 "console=ttymxc1,115200\0" \
Steffen Dirkwinkela2cab662019-10-23 07:40:42 +020048 "stdin=serial\0" \
49 "stdout=serial,vidconsole\0" \
50 "stderr=serial,vidconsole\0" \
Steffen Dirkwinkelab0ed602019-10-23 07:40:43 +020051 "fdtfile=imx53-cx9020.dtb\0" \
52 BOOTENV
Patrick Bruennba81b042016-11-04 11:57:02 +010053
Patrick Bruennba81b042016-11-04 11:57:02 +010054/* Miscellaneous configurable options */
Patrick Bruennba81b042016-11-04 11:57:02 +010055
Patrick Bruennba81b042016-11-04 11:57:02 +010056/* Physical Memory Map */
Patrick Bruennba81b042016-11-04 11:57:02 +010057#define PHYS_SDRAM_1 CSD0_BASE_ADDR
58#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
59#define PHYS_SDRAM_2 CSD1_BASE_ADDR
60#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
61#define PHYS_SDRAM_SIZE (gd->ram_size)
62
Tom Rinibb4dd962022-11-16 13:10:37 -050063#define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
Tom Rini6a5dccc2022-11-16 13:10:41 -050064#define CFG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
65#define CFG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
Patrick Bruennba81b042016-11-04 11:57:02 +010066
Masahiro Yamada8cea9b52017-02-11 22:43:54 +090067/* environment organization */
Patrick Bruennba81b042016-11-04 11:57:02 +010068
Patrick Bruennba81b042016-11-04 11:57:02 +010069#endif /* __CONFIG_H */