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Mario Six3e67cb22019-01-21 09:18:23 +01001/*
2 * Internal Definitions
3 */
Simon Glassfb64e362020-05-10 11:40:09 -06004#include <linux/stringify.h>
Mario Six3e67cb22019-01-21 09:18:23 +01005#define BOOTFLASH_START 0xF0000000
6
Mario Six3e67cb22019-01-21 09:18:23 +01007/*
8 * DDR Setup
9 */
Tom Rinibb4dd962022-11-16 13:10:37 -050010#define CFG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */
Mario Six3e67cb22019-01-21 09:18:23 +010011
Tom Rini6a5dccc2022-11-16 13:10:41 -050012#define CFG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \
Mario Six3e67cb22019-01-21 09:18:23 +010013 DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
14
15#define CFG_83XX_DDR_USES_CS0
16
17/*
18 * Manually set up DDR parameters
19 */
Tom Rinibb4dd962022-11-16 13:10:37 -050020#define CFG_SYS_SDRAM_SIZE 0x80000000 /* 2048 MiB */
Mario Six3e67cb22019-01-21 09:18:23 +010021
22/*
23 * The reserved memory
24 */
Tom Rini6a5dccc2022-11-16 13:10:41 -050025#define CFG_SYS_FLASH_BASE 0xF0000000
Mario Six3e67cb22019-01-21 09:18:23 +010026
Mario Six3e67cb22019-01-21 09:18:23 +010027/* Reserve 768 kB for Mon */
Mario Six3e67cb22019-01-21 09:18:23 +010028
29/*
30 * Initial RAM Base Address Setup
31 */
Tom Rini6a5dccc2022-11-16 13:10:41 -050032#define CFG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */
33#define CFG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in RAM */
Mario Six3e67cb22019-01-21 09:18:23 +010034/*
35 * Init Local Bus Memory Controller:
36 *
37 * Bank Bus Machine PortSz Size Device
38 * ---- --- ------- ------ ----- ------
39 * 0 Local GPCM 16 bit 256MB FLASH
40 * 1 Local GPCM 8 bit 128MB GPIO/PIGGY
41 *
42 */
43
44/*
45 * FLASH on the Local Bus
46 */
Tom Rini6a5dccc2022-11-16 13:10:41 -050047#define CFG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */
Mario Six3e67cb22019-01-21 09:18:23 +010048
Tom Rini6a5dccc2022-11-16 13:10:41 -050049#define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE }
Mario Six3e67cb22019-01-21 09:18:23 +010050
Mario Six3e67cb22019-01-21 09:18:23 +010051/* I2C */
Tom Rini0a2bac72022-11-16 13:10:29 -050052#define CFG_SYS_NUM_I2C_BUSES 4
Tom Rini6a5dccc2022-11-16 13:10:41 -050053#define CFG_SYS_I2C_MAX_HOPS 1
54#define CFG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP} }, \
Mario Six3e67cb22019-01-21 09:18:23 +010055 {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
56 {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
57 {1, {I2C_NULL_HOP} } }
58
Mario Six3e67cb22019-01-21 09:18:23 +010059#if defined(CONFIG_CMD_NAND)
60#define CONFIG_NAND_KMETER1
Tom Rini6a5dccc2022-11-16 13:10:41 -050061#define CFG_SYS_NAND_BASE CFG_SYS_KMBEC_FPGA_BASE
Mario Six3e67cb22019-01-21 09:18:23 +010062#endif
63
64/*
65 * For booting Linux, the board info and command line data
66 * have to be in the first 8 MB of memory, since this is
67 * the maximum mapped by the Linux kernel during initialization.
68 */
Tom Rini6a5dccc2022-11-16 13:10:41 -050069#define CFG_SYS_BOOTMAPSZ (8 << 20)
Mario Six3e67cb22019-01-21 09:18:23 +010070
71/*
72 * Environment
73 */
74
Mario Six3e67cb22019-01-21 09:18:23 +010075/*
76 * Environment Configuration
77 */
Mario Six3e67cb22019-01-21 09:18:23 +010078#ifndef CONFIG_KM_DEF_ENV /* if not set by keymile-common.h */
79#define CONFIG_KM_DEF_ENV "km-common=empty\0"
80#endif
81
82#ifndef CONFIG_KM_DEF_ARCH
83#define CONFIG_KM_DEF_ARCH "arch=ppc_82xx\0"
84#endif
85
86#define CONFIG_EXTRA_ENV_SETTINGS \
87 CONFIG_KM_DEF_ENV \
88 CONFIG_KM_DEF_ARCH \
89 "newenv=" \
90 "prot off " __stringify(CONFIG_ENV_ADDR) " +0x40000 && " \
91 "era " __stringify(CONFIG_ENV_ADDR) " +0x40000\0" \
92 "unlock=yes\0" \
93 ""
94
Mario Six3e67cb22019-01-21 09:18:23 +010095/*
96 * QE UEC ethernet configuration
97 */
98#define CONFIG_UEC_ETH