Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Configuation settings for the Renesas R7780MP board |
| 3 | * |
Nobuhiro Iwamatsu | 3ac0212 | 2008-06-17 16:28:01 +0900 | [diff] [blame] | 4 | * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 5 | * Copyright (C) 2008 Yusuke Goda <goda.yusuke@renesas.com> |
| 6 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 7 | * SPDX-License-Identifier: GPL-2.0+ |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #ifndef __R7780RP_H |
| 11 | #define __R7780RP_H |
| 12 | |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 13 | #define CONFIG_CPU_SH7780 1 |
| 14 | #define CONFIG_R7780MP 1 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 15 | #define CONFIG_SYS_R7780MP_OLD_FLASH 1 |
Nobuhiro Iwamatsu | 3ac0212 | 2008-06-17 16:28:01 +0900 | [diff] [blame] | 16 | #define __LITTLE_ENDIAN__ 1 |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 17 | |
Vladimir Zapolskiy | 5e72b84 | 2016-11-28 00:15:30 +0200 | [diff] [blame] | 18 | #define CONFIG_DISPLAY_BOARDINFO |
| 19 | |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 20 | /* |
| 21 | * Command line configuration. |
| 22 | */ |
| 23 | #define CONFIG_CMD_SDRAM |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 24 | #define CONFIG_CMD_PCI |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 25 | #define CONFIG_CMD_IDE |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 26 | #define CONFIG_DOS_PARTITION |
| 27 | |
Jean-Christophe PLAGNIOL-VILLARD | 6ce9ea6 | 2008-08-13 01:40:38 +0200 | [diff] [blame] | 28 | #define CONFIG_SCIF_CONSOLE 1 |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 29 | #define CONFIG_BAUDRATE 115200 |
| 30 | #define CONFIG_CONS_SCIF0 1 |
| 31 | |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 32 | #define CONFIG_BOOTARGS "console=ttySC0,115200" |
| 33 | #define CONFIG_ENV_OVERWRITE 1 |
| 34 | |
Nobuhiro Iwamatsu | b816b98 | 2011-01-17 20:50:26 +0900 | [diff] [blame] | 35 | #define CONFIG_SYS_TEXT_BASE 0x0FFC0000 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 36 | #define CONFIG_SYS_SDRAM_BASE (0x08000000) |
| 37 | #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 38 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 39 | #define CONFIG_SYS_LONGHELP |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 40 | #define CONFIG_SYS_CBSIZE 256 |
| 41 | #define CONFIG_SYS_PBSIZE 256 |
| 42 | #define CONFIG_SYS_MAXARGS 16 |
| 43 | #define CONFIG_SYS_BARGSIZE 512 |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 44 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 45 | #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) |
Wolfgang Denk | 0708bc6 | 2010-10-07 21:51:12 +0200 | [diff] [blame] | 46 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 47 | |
Nobuhiro Iwamatsu | 3ac0212 | 2008-06-17 16:28:01 +0900 | [diff] [blame] | 48 | /* Flash board support */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 49 | #define CONFIG_SYS_FLASH_BASE (0xA0000000) |
| 50 | #ifdef CONFIG_SYS_R7780MP_OLD_FLASH |
Nobuhiro Iwamatsu | 3ac0212 | 2008-06-17 16:28:01 +0900 | [diff] [blame] | 51 | /* NOR Flash (S29PL127J60TFI130) */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 52 | # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT |
| 53 | # define CONFIG_SYS_MAX_FLASH_BANKS (2) |
| 54 | # define CONFIG_SYS_MAX_FLASH_SECT 270 |
| 55 | # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE,\ |
| 56 | CONFIG_SYS_FLASH_BASE + 0x100000,\ |
| 57 | CONFIG_SYS_FLASH_BASE + 0x400000,\ |
| 58 | CONFIG_SYS_FLASH_BASE + 0x700000, } |
| 59 | #else /* CONFIG_SYS_R7780MP_OLD_FLASH */ |
Nobuhiro Iwamatsu | 3ac0212 | 2008-06-17 16:28:01 +0900 | [diff] [blame] | 60 | /* NOR Flash (Spantion S29GL256P) */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 61 | # define CONFIG_SYS_MAX_FLASH_BANKS (1) |
| 62 | # define CONFIG_SYS_MAX_FLASH_SECT 256 |
| 63 | # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } |
| 64 | #endif /* CONFIG_SYS_R7780MP_OLD_FLASH */ |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 65 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 66 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 67 | /* Address of u-boot image in Flash */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 68 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) |
| 69 | #define CONFIG_SYS_MONITOR_LEN (256 * 1024) |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 70 | /* Size of DRAM reserved for malloc() use */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 71 | #define CONFIG_SYS_MALLOC_LEN (1204 * 1024) |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 72 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 73 | #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) |
| 74 | #define CONFIG_SYS_RX_ETH_BUFFER (8) |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 75 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 76 | #define CONFIG_SYS_FLASH_CFI |
Jean-Christophe PLAGNIOL-VILLARD | 8d94c23 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 77 | #define CONFIG_FLASH_CFI_DRIVER |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 78 | #undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE |
| 79 | #undef CONFIG_SYS_FLASH_QUIET_TEST |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 80 | /* print 'E' for empty sector on flinfo */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 81 | #define CONFIG_SYS_FLASH_EMPTY_INFO |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 82 | |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 83 | #define CONFIG_ENV_IS_IN_FLASH |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 84 | #define CONFIG_ENV_SECT_SIZE (256 * 1024) |
| 85 | #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 86 | #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) |
| 87 | #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 |
| 88 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 89 | |
| 90 | /* Board Clock */ |
| 91 | #define CONFIG_SYS_CLK_FREQ 33333333 |
Nobuhiro Iwamatsu | e698449 | 2013-08-21 16:11:21 +0900 | [diff] [blame] | 92 | #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ |
| 93 | #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ |
Jean-Christophe PLAGNIOL-VILLARD | 32e6acc | 2009-06-04 12:06:48 +0200 | [diff] [blame] | 94 | #define CONFIG_SYS_TMU_CLK_DIV 4 |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 95 | |
| 96 | /* PCI Controller */ |
| 97 | #if defined(CONFIG_CMD_PCI) |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 98 | #define CONFIG_SH4_PCI |
Nobuhiro Iwamatsu | 5aa5d67 | 2008-03-24 02:11:26 +0900 | [diff] [blame] | 99 | #define CONFIG_SH7780_PCI |
Yoshihiro Shimoda | 30e055b | 2009-02-25 14:26:42 +0900 | [diff] [blame] | 100 | #define CONFIG_SH7780_PCI_LSR 0x07f00001 |
| 101 | #define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE |
| 102 | #define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 103 | #define CONFIG_PCI_SCAN_SHOW 1 |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 104 | #define __mem_pci |
| 105 | |
| 106 | #define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */ |
| 107 | #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS |
| 108 | #define CONFIG_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */ |
| 109 | |
| 110 | #define CONFIG_PCI_IO_BUS 0xFE200000 /* IO space base address */ |
| 111 | #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS |
| 112 | #define CONFIG_PCI_IO_SIZE 0x00200000 /* Size of IO window */ |
Nobuhiro Iwamatsu | 41773f5 | 2009-07-08 11:42:19 +0900 | [diff] [blame] | 113 | #define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE |
| 114 | #define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE |
| 115 | #define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 116 | #endif /* CONFIG_CMD_PCI */ |
| 117 | |
| 118 | #if defined(CONFIG_CMD_NET) |
Marcel Ziswiler | e7422af | 2009-09-09 21:09:00 +0200 | [diff] [blame] | 119 | /* AX88796L Support(NE2000 base chip) */ |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 120 | #define CONFIG_DRIVER_AX88796L |
| 121 | #define CONFIG_DRIVER_NE2000_BASE 0xA4100000 |
| 122 | #endif |
| 123 | |
| 124 | /* Compact flash Support */ |
| 125 | #if defined(CONFIG_CMD_IDE) |
| 126 | #define CONFIG_IDE_RESET 1 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 127 | #define CONFIG_SYS_PIO_MODE 1 |
| 128 | #define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */ |
| 129 | #define CONFIG_SYS_IDE_MAXDEVICE 1 |
| 130 | #define CONFIG_SYS_ATA_BASE_ADDR 0xb4000000 |
| 131 | #define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */ |
| 132 | #define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */ |
| 133 | #define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */ |
| 134 | #define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */ |
Albert Aribaud | 036c6b4 | 2010-08-08 05:17:05 +0530 | [diff] [blame] | 135 | #define CONFIG_IDE_SWAP_IO |
Yusuke Goda | cf23602 | 2008-03-11 12:55:12 +0900 | [diff] [blame] | 136 | #endif /* CONFIG_CMD_IDE */ |
| 137 | |
| 138 | #endif /* __R7780RP_H */ |