Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2015 Beckhoff Automation GmbH & Co. KG |
| 3 | * Patrick Bruenn <p.bruenn@beckhoff.com> |
| 4 | * |
| 5 | * Configuration settings for Beckhoff CX9020. |
| 6 | * |
| 7 | * Based on Freescale's Linux i.MX mx53loco.h file: |
| 8 | * Copyright (C) 2010-2011 Freescale Semiconductor. |
| 9 | * |
| 10 | * SPDX-License-Identifier: GPL-2.0+ |
| 11 | */ |
| 12 | |
| 13 | #ifndef __CONFIG_H |
| 14 | #define __CONFIG_H |
| 15 | |
| 16 | #include <asm/arch/imx-regs.h> |
| 17 | |
| 18 | #define CONFIG_CMDLINE_TAG |
| 19 | #define CONFIG_SETUP_MEMORY_TAGS |
| 20 | #define CONFIG_INITRD_TAG |
| 21 | |
| 22 | #define CONFIG_SYS_FSL_CLK |
| 23 | |
| 24 | /* Size of malloc() pool */ |
| 25 | #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) |
| 26 | |
| 27 | #define CONFIG_BOARD_EARLY_INIT_F |
| 28 | #define CONFIG_BOARD_LATE_INIT |
| 29 | #define CONFIG_MXC_GPIO |
| 30 | #define CONFIG_REVISION_TAG |
| 31 | |
| 32 | #define CONFIG_MXC_UART_BASE UART2_BASE |
| 33 | |
| 34 | #define CONFIG_FPGA_COUNT 1 |
| 35 | |
| 36 | /* MMC Configs */ |
| 37 | #define CONFIG_FSL_ESDHC |
| 38 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
| 39 | #define CONFIG_SYS_FSL_ESDHC_NUM 2 |
| 40 | |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 41 | #define CONFIG_GENERIC_MMC |
| 42 | |
| 43 | /* bootz: zImage/initrd.img support */ |
| 44 | #define CONFIG_DOS_PARTITION |
| 45 | |
| 46 | /* Eth Configs */ |
| 47 | #define CONFIG_MII |
| 48 | #define IMX_FEC_BASE FEC_BASE_ADDR |
| 49 | #define CONFIG_ETHPRIME "FEC0" |
| 50 | #define CONFIG_FEC_MXC_PHYADDR 0x1F |
| 51 | |
| 52 | /* USB Configs */ |
| 53 | #define CONFIG_USB_EHCI |
| 54 | #define CONFIG_USB_EHCI_MX5 |
| 55 | #define CONFIG_USB_STORAGE |
| 56 | #define CONFIG_USB_HOST_ETHER |
| 57 | #define CONFIG_USB_ETHER_ASIX |
| 58 | #define CONFIG_USB_ETHER_MCS7830 |
| 59 | #define CONFIG_USB_ETHER_SMSC95XX |
| 60 | #define CONFIG_MXC_USB_PORT 1 |
| 61 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) |
| 62 | #define CONFIG_MXC_USB_FLAGS 0 |
| 63 | |
| 64 | /* allow to overwrite serial and ethaddr */ |
| 65 | #define CONFIG_ENV_OVERWRITE |
| 66 | #define CONFIG_CONS_INDEX 1 |
| 67 | #define CONFIG_BAUDRATE 115200 |
| 68 | |
| 69 | /* Command definition */ |
| 70 | #define CONFIG_SUPPORT_RAW_INITRD |
| 71 | |
| 72 | #define CONFIG_LOADADDR 0x70010000 /* loadaddr env var */ |
| 73 | #define CONFIG_SYS_TEXT_BASE 0x77800000 |
| 74 | |
| 75 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 76 | "fdt_addr=0x71ff0000\0" \ |
| 77 | "rdaddr=0x72000000\0" \ |
| 78 | "console=ttymxc1,115200\0" \ |
| 79 | "uenv=/boot/uEnv.txt\0" \ |
| 80 | "optargs=\0" \ |
| 81 | "cmdline=\0" \ |
| 82 | "mmcdev=0\0" \ |
| 83 | "mmcpart=1\0" \ |
| 84 | "mmcrootfstype=ext4 rootwait fixrtc\0" \ |
| 85 | "mmcargs=setenv bootargs console=${console} " \ |
| 86 | "${optargs} " \ |
| 87 | "root=/dev/mmcblk${mmcdev}p${mmcpart} ro " \ |
| 88 | "rootfstype=${mmcrootfstype} " \ |
| 89 | "${cmdline}\0" \ |
| 90 | "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ |
| 91 | "loadrd=load mmc ${bootpart} ${rdaddr} ${bootdir}/${rdfile};" \ |
| 92 | "setenv rdsize ${filesize}\0" \ |
| 93 | "loadfdt=echo loading ${fdt_path} ...;" \ |
| 94 | "load mmc ${bootpart} ${fdt_addr} ${fdt_path}\0" \ |
| 95 | "mmcboot=mmc dev ${mmcdev}; " \ |
| 96 | "if mmc rescan; then " \ |
| 97 | "echo SD/MMC found on device ${mmcdev};" \ |
| 98 | "echo Checking for: ${uenv} ...;" \ |
| 99 | "setenv bootpart ${mmcdev}:${mmcpart};" \ |
| 100 | "if test -e mmc ${bootpart} ${uenv}; then " \ |
| 101 | "load mmc ${bootpart} ${loadaddr} ${uenv};" \ |
| 102 | "env import -t ${loadaddr} ${filesize};" \ |
| 103 | "echo Loaded environment from ${uenv};" \ |
| 104 | "if test -n ${dtb}; then " \ |
| 105 | "setenv fdt_file ${dtb};" \ |
| 106 | "echo Using: dtb=${fdt_file} ...;" \ |
| 107 | "fi;" \ |
| 108 | "echo Checking for uname_r in ${uenv}...;" \ |
| 109 | "if test -n ${uname_r}; then " \ |
| 110 | "echo Running uname_boot ...;" \ |
| 111 | "run uname_boot;" \ |
| 112 | "fi;" \ |
| 113 | "fi;" \ |
| 114 | "fi;\0" \ |
| 115 | "uname_boot="\ |
| 116 | "setenv bootdir /boot; " \ |
| 117 | "setenv bootfile vmlinuz-${uname_r}; " \ |
| 118 | "setenv ccatfile /boot/ccat.rbf; " \ |
| 119 | "echo loading CCAT firmware from ${ccatfile}; " \ |
| 120 | "load mmc ${bootpart} ${loadaddr} ${ccatfile}; " \ |
| 121 | "fpga load 0 ${loadaddr} ${filesize}; " \ |
| 122 | "if test -e mmc ${bootpart} ${bootdir}/${bootfile}; then " \ |
| 123 | "echo loading ${bootdir}/${bootfile} ...; " \ |
| 124 | "run loadimage;" \ |
| 125 | "setenv fdt_path /boot/dtbs/${uname_r}/${fdt_file}; " \ |
| 126 | "if test -e mmc ${bootpart} ${fdt_path}; then " \ |
| 127 | "run loadfdt;" \ |
| 128 | "else " \ |
| 129 | "echo; echo unable to find ${fdt_file} ...;" \ |
| 130 | "echo booting legacy ...;"\ |
| 131 | "run mmcargs;" \ |
| 132 | "echo debug: [${bootargs}] ... ;" \ |
| 133 | "echo debug: [bootz ${loadaddr}] ... ;" \ |
| 134 | "bootz ${loadaddr}; " \ |
| 135 | "fi;" \ |
| 136 | "run mmcargs;" \ |
| 137 | "echo debug: [${bootargs}] ... ;" \ |
| 138 | "echo debug: [bootz ${loadaddr} - ${fdt_addr}] ... ;" \ |
| 139 | "bootz ${loadaddr} - ${fdt_addr}; " \ |
| 140 | "fi;\0" |
| 141 | |
| 142 | #define CONFIG_BOOTCOMMAND \ |
| 143 | "run mmcboot;" |
| 144 | |
| 145 | #define CONFIG_ARP_TIMEOUT 200UL |
| 146 | |
| 147 | /* Miscellaneous configurable options */ |
| 148 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 149 | #define CONFIG_AUTO_COMPLETE |
| 150 | #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ |
| 151 | |
| 152 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 153 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
| 154 | |
| 155 | #define CONFIG_SYS_MEMTEST_START 0x70000000 |
| 156 | #define CONFIG_SYS_MEMTEST_END 0x70010000 |
| 157 | |
| 158 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
| 159 | |
| 160 | #define CONFIG_CMDLINE_EDITING |
| 161 | |
| 162 | /* Physical Memory Map */ |
| 163 | #define CONFIG_NR_DRAM_BANKS 2 |
| 164 | #define PHYS_SDRAM_1 CSD0_BASE_ADDR |
| 165 | #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) |
| 166 | #define PHYS_SDRAM_2 CSD1_BASE_ADDR |
| 167 | #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) |
| 168 | #define PHYS_SDRAM_SIZE (gd->ram_size) |
| 169 | |
| 170 | #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) |
| 171 | #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) |
| 172 | #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) |
| 173 | |
| 174 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
| 175 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| 176 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 177 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| 178 | |
| 179 | /* FLASH and environment organization */ |
| 180 | #define CONFIG_SYS_NO_FLASH |
| 181 | |
| 182 | #define CONFIG_ENV_OFFSET (6 * 64 * 1024) |
| 183 | #define CONFIG_ENV_SIZE (8 * 1024) |
| 184 | #define CONFIG_ENV_IS_IN_MMC |
| 185 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
| 186 | |
| 187 | /* Framebuffer and LCD */ |
| 188 | #define CONFIG_PREBOOT |
| 189 | #define CONFIG_VIDEO_IPUV3 |
| 190 | #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE |
| 191 | #define CONFIG_VIDEO_BMP_RLE8 |
| 192 | #define CONFIG_SPLASH_SCREEN |
| 193 | #define CONFIG_BMP_16BPP |
| 194 | #define CONFIG_VIDEO_LOGO |
| 195 | #define CONFIG_IPUV3_CLK 200000000 |
| 196 | |
| 197 | #endif /* __CONFIG_H */ |