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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Eddy Petrișor5178dc12016-06-05 03:43:00 +03002/*
3 * (C) Copyright 2015-2016, Freescale Semiconductor, Inc.
Eddy Petrișor5178dc12016-06-05 03:43:00 +03004 */
5
6#ifndef __ASM_ARCH_CLOCK_H
7#define __ASM_ARCH_CLOCK_H
8
Eddy Petrișor5178dc12016-06-05 03:43:00 +03009enum mxc_clock {
10 MXC_ARM_CLK = 0,
11 MXC_BUS_CLK,
12 MXC_PERIPHERALS_CLK,
13 MXC_UART_CLK,
14 MXC_USDHC_CLK,
15 MXC_FEC_CLK,
16 MXC_I2C_CLK,
17};
18enum pll_type {
19 ARM_PLL = 0,
20 PERIPH_PLL,
21 ENET_PLL,
22 DDR_PLL,
23 VIDEO_PLL,
24};
25
26unsigned int mxc_get_clock(enum mxc_clock clk);
27void clock_init(void);
28
29#define imx_get_fecclk() mxc_get_clock(MXC_FEC_CLK)
30
31#endif /* __ASM_ARCH_CLOCK_H */