| Angelo Dureghello | c6164c9 | 2019-03-13 21:46:41 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| Angelo Durgehello | c6e17f9 | 2019-11-15 23:54:12 +0100 | [diff] [blame] | 3 | * Copyright (C) 2019 Angelo Dureghello <angelo@sysam.it> |
| Angelo Dureghello | c6164c9 | 2019-03-13 21:46:41 +0100 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | / { |
| 7 | compatible = "fsl,mcf5275"; |
| 8 | |
| 9 | aliases { |
| 10 | serial0 = &uart0; |
| Angelo Durgehello | c6e17f9 | 2019-11-15 23:54:12 +0100 | [diff] [blame] | 11 | fec0 = &fec0; |
| 12 | fec1 = &fec1; |
| Angelo Dureghello | c6164c9 | 2019-03-13 21:46:41 +0100 | [diff] [blame] | 13 | }; |
| 14 | |
| 15 | soc { |
| 16 | compatible = "simple-bus"; |
| 17 | #address-cells = <1>; |
| 18 | #size-cells = <1>; |
| 19 | |
| 20 | ipsbar: ipsbar@4000000 { |
| 21 | compatible = "simple-bus"; |
| 22 | #address-cells = <1>; |
| 23 | #size-cells = <1>; |
| 24 | ranges = <0x00000000 0x40000000 0x40000000>; |
| 25 | reg = <0x40000000 0x40000000>; |
| 26 | |
| 27 | uart0: uart@200 { |
| 28 | compatible = "fsl,mcf-uart"; |
| 29 | reg = <0x200 0x40>; |
| 30 | status = "disabled"; |
| 31 | }; |
| 32 | |
| 33 | uart1: uart@240 { |
| 34 | compatible = "fsl,mcf-uart"; |
| 35 | reg = <0x240 0x40>; |
| 36 | status = "disabled"; |
| 37 | }; |
| 38 | |
| 39 | uart2: uart@280 { |
| 40 | compatible = "fsl,mcf-uart"; |
| 41 | reg = <0x280 0x40>; |
| 42 | status = "disabled"; |
| 43 | }; |
| Angelo Durgehello | c6e17f9 | 2019-11-15 23:54:12 +0100 | [diff] [blame] | 44 | |
| 45 | fec0: ethernet@1000 { |
| 46 | compatible = "fsl,mcf-fec"; |
| 47 | reg = <0x1000 0x800>; |
| 48 | max-speed = <100>; |
| 49 | phy-addr = <(-1)>; |
| 50 | timeout-loop = <50000>; |
| 51 | status = "disabled"; |
| 52 | }; |
| 53 | |
| 54 | fec1: ethernet@1800 { |
| 55 | compatible = "fsl,mcf-fec"; |
| 56 | reg = <0x1800 0x800>; |
| 57 | mii-base = <0>; |
| 58 | max-speed = <100>; |
| 59 | timeout-loop = <50000>; |
| 60 | status = "disabled"; |
| 61 | }; |
| Angelo Dureghello | d768df1 | 2023-04-05 00:59:27 +0200 | [diff] [blame] | 62 | |
| 63 | i2c0: i2c@300 { |
| 64 | compatible = "fsl-i2c"; |
| 65 | #address-cells=<1>; |
| 66 | #size-cells=<0>; |
| 67 | cell-index = <0>; |
| 68 | reg = <0x300 0x14>; |
| 69 | clock-frequency = <100000>; |
| 70 | status = "disabled"; |
| 71 | }; |
| Angelo Dureghello | c6164c9 | 2019-03-13 21:46:41 +0100 | [diff] [blame] | 72 | }; |
| 73 | }; |
| 74 | }; |