blob: 1f2982c36f9e40c29c107480f27397405c7a49b8 [file] [log] [blame]
Bryan Brattlofcf2e2b12024-03-12 15:20:30 -05001.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2.. sectionauthor:: Bryan Brattlof <bb@ti.com>
3
4AM62Px Platforms
5================
6
7The AM62Px is an extension of the existing Sitara AM62x low-cost family
8of application processors built for Automotive and Linux Application
9development. Scalable Arm Cortex-A53 performance and embedded features,
10such as: multi high-definition display support, 3D-graphics
11acceleration, 4K video acceleration, and extensive peripherals make the
12AM62Px well-suited for a broad range of automation and industrial
13application, including automotive digital instrumentation, automotive
14displays, industrial HMI, and more.
15
16Some highlights of AM62P SoC are:
17
18* Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster.
19 Dual/Single core variants are provided in the same package to allow HW
20 compatible designs.
21
22* One Device manager Cortex-R5F for system power and resource
23 management, and one Cortex-R5F for Functional Safety or
24 general-purpose usage.
25
26* One 3D GPU up to 50 GLFOPS
27
28* H.264/H.265 Video Encode/Decode.
29
30* Display support: 3x display support over OLDI/LVDS (1x OLDI-DL, 1x or
31 2x OLDI-SL), DSI, or DPI. Up to 3840x1080 @ 60fps resolution
32
33* Integrated Giga-bit Ethernet switch supporting up to a total of two
34 external ports (TSN capable).
35
36* 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3xMMC and SD, GPMC for
37 NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio,
38 1xCSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals.
39
40* Dedicated Centralized Hardware Security Module with support for secure
41 boot, debug security and crypto acceleration and trusted execution
42 environment.
43
44* One 32-bit DDR Subsystem that supports LPDDR4, DDR4 memory types.
45
46* Multiple low power modes support, ex: Deep sleep, Standby, MCU-only,
47 enabling battery powered system design.
48
49For those interested, more details about this SoC can be found in the
50Technical Reference Manual here: https://www.ti.com/lit/pdf/spruj83
51
52Boot Flow:
53----------
54
55The bootflow is exactly the same as all SoCs in the am62xxx extended SoC
56family. Below is the pictorial representation:
57
58.. image:: img/boot_diagram_k3_current.svg
59 :alt: Boot flow diagram
60
61- Here TIFS acts as master and provides all the critical services. R5/A53
62 requests TIFS to get these services done as shown in the above diagram.
63
64Sources:
65--------
66
67.. include:: ../ti/k3.rst
68 :start-after: .. k3_rst_include_start_boot_sources
69 :end-before: .. k3_rst_include_end_boot_sources
70
71Build procedure:
72----------------
73
740. Setup the environment variables:
75
76.. include:: ../ti/k3.rst
77 :start-after: .. k3_rst_include_start_common_env_vars_desc
78 :end-before: .. k3_rst_include_end_common_env_vars_desc
79
80.. include:: ../ti/k3.rst
81 :start-after: .. k3_rst_include_start_board_env_vars_desc
82 :end-before: .. k3_rst_include_end_board_env_vars_desc
83
84Set the variables corresponding to this platform:
85
86.. include:: ../ti/k3.rst
87 :start-after: .. k3_rst_include_start_common_env_vars_defn
88 :end-before: .. k3_rst_include_end_common_env_vars_defn
89
90.. code-block:: bash
91
92 $ export UBOOT_CFG_CORTEXR=am62px_evm_r5_defconfig
93 $ export UBOOT_CFG_CORTEXA=am62px_evm_a53_defconfig
94 $ export TFA_BOARD=lite
95 $ # we dont use any extra TFA parameters
96 $ unset TFA_EXTRA_ARGS
97 $ export OPTEE_PLATFORM=k3-am62x
98 $ export OPTEE_EXTRA_ARGS="CFG_WITH_SOFTWARE_PRNG=y"
99
100.. am62px_evm_rst_include_start_build_steps
101
1021. Trusted Firmware-A:
103
104.. include:: ../ti/k3.rst
105 :start-after: .. k3_rst_include_start_build_steps_tfa
106 :end-before: .. k3_rst_include_end_build_steps_tfa
107
108
1092. OP-TEE:
110
111.. include:: ../ti/k3.rst
112 :start-after: .. k3_rst_include_start_build_steps_optee
113 :end-before: .. k3_rst_include_end_build_steps_optee
114
1153. U-Boot:
116
117* 3.1 R5:
118
119.. include:: ../ti/k3.rst
120 :start-after: .. k3_rst_include_start_build_steps_spl_r5
121 :end-before: .. k3_rst_include_end_build_steps_spl_r5
122
123* 3.2 A53:
124
125.. include:: ../ti/k3.rst
126 :start-after: .. k3_rst_include_start_build_steps_uboot
127 :end-before: .. k3_rst_include_end_build_steps_uboot
128.. am62px_evm_rst_include_end_build_steps
129
130Target Images
131--------------
132
133In order to boot we need tiboot3.bin, tispl.bin and u-boot.img. Each SoC
134variant (HS-FS, HS-SE) requires a different source for these files.
135
136 - HS-FS
137
138 * tiboot3-am62px-hs-fs-evm.bin from step 3.1
139 * tispl.bin, u-boot.img from step 3.2
140
141 - HS-SE
142
143 * tiboot3-am62px-hs-evm.bin from step 3.1
144 * tispl.bin, u-boot.img from step 3.2
145
146Image formats:
147--------------
148
149- tiboot3.bin
150
151.. image:: img/multi_cert_tiboot3.bin.svg
152 :alt: tiboot3.bin image format
153
154- tispl.bin
155
156.. image:: img/dm_tispl.bin.svg
157 :alt: tispl.bin image format
158
159A53 SPL DDR Memory Layout
160-------------------------
161
162.. am62px_evm_rst_include_start_ddr_mem_layout
163
164This provides an overview memory usage in A53 SPL stage.
165
166.. list-table::
167 :widths: 16 16 16
168 :header-rows: 1
169
170 * - Region
171 - Start Address
172 - End Address
173
174 * - EMPTY
175 - 0x80000000
176 - 0x80080000
177
178 * - TEXT BASE
179 - 0x80080000
180 - 0x800d8000
181
182 * - EMPTY
183 - 0x800d8000
184 - 0x80200000
185
186 * - BMP IMAGE
187 - 0x80200000
188 - 0x80b77660
189
190 * - STACK
191 - 0x80b77660
192 - 0x80b77e60
193
194 * - GD
195 - 0x80b77e60
196 - 0x80b78000
197
198 * - MALLOC
199 - 0x80b78000
200 - 0x80b80000
201
202 * - EMPTY
203 - 0x80b80000
204 - 0x80c80000
205
206 * - BSS
207 - 0x80c80000
208 - 0x80d00000
209
210 * - BLOBS
211 - 0x80d00000
212 - 0x80d00400
213
214 * - EMPTY
215 - 0x80d00400
216 - 0x81000000
217.. am62px_evm_rst_include_end_ddr_mem_layout
218
219Switch Setting for Boot Mode
220----------------------------
221
222Boot Mode pins provide means to select the boot mode and options before the
223device is powered up. After every POR, they are the main source to populate
224the Boot Parameter Tables.
225
226The following table shows some common boot modes used on AM62Px
227platforms. More details can be found in the Technical Reference Manual:
228https://www.ti.com/lit/pdf/spruj83 under the `Boot Mode Pins` section.
229
230.. note::
231
232 This device is very new. Currently only UART boot is available while
233 we continue to add support for the other bootmodes.
234
235.. list-table:: Boot Modes
236 :widths: 16 16 16
237 :header-rows: 1
238
239 * - Switch Label
240 - SW2: 12345678
241 - SW3: 12345678
242
243 * - SD
244 - 01000000
245 - 11000010
246
247 * - OSPI
248 - 00000000
249 - 11001110
250
251 * - EMMC
252 - 00000000
253 - 11010010
254
255 * - UART
256 - 00000000
257 - 11011100
258
259 * - USB DFU
260 - 00000000
261 - 11001010
262
263For SW2 and SW1, the switch state in the "ON" position = 1.
264
265Debugging U-Boot
266----------------
267
268See :ref:`Common Debugging environment - OpenOCD<k3_rst_refer_openocd>`: for
269detailed setup information.
270
271.. warning::
272
273 **OpenOCD support after**: v0.12.0
274
275 While support for the entire K3 generation including the am62xxx
276 extended family was added before v0.12.0, the tcl scripts for the
277 am62px have been accepted and will be available in the next release of
278 OpenOCD. It may be necessary to build OpenOCD from source depending on
279 the version your distribution has packaged.
280
281.. include:: k3.rst
282 :start-after: .. k3_rst_include_start_openocd_connect_XDS110
283 :end-before: .. k3_rst_include_end_openocd_connect_XDS110
284
285To start OpenOCD and connect to the board
286
287.. code-block:: bash
288
289 openocd -f board/ti_am62pevm.cfg