Mike Frysinger | 94bae5c | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 1 | /* |
| 2 | * reset.c - logic for resetting the cpu |
| 3 | * |
| 4 | * Copyright (c) 2005-2008 Analog Devices Inc. |
| 5 | * |
| 6 | * Licensed under the GPL-2 or later. |
| 7 | */ |
| 8 | |
| 9 | #include <common.h> |
| 10 | #include <command.h> |
| 11 | #include <asm/blackfin.h> |
| 12 | #include "cpu.h" |
| 13 | |
| 14 | /* A system soft reset makes external memory unusable so force |
| 15 | * this function into L1. We use the compiler ssync here rather |
| 16 | * than SSYNC() because it's safe (no interrupts and such) and |
| 17 | * we save some L1. We do not need to force sanity in the SYSCR |
| 18 | * register as the BMODE selection bit is cleared by the soft |
| 19 | * reset while the Core B bit (on dual core parts) is cleared by |
| 20 | * the core reset. |
| 21 | */ |
| 22 | __attribute__ ((__l1_text__, __noreturn__)) |
Mike Frysinger | 5eee5c2 | 2008-10-11 21:49:06 -0400 | [diff] [blame] | 23 | static void bfin_reset(void) |
Mike Frysinger | 94bae5c | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 24 | { |
| 25 | /* Wait for completion of "system" events such as cache line |
| 26 | * line fills so that we avoid infinite stalls later on as |
| 27 | * much as possible. This code is in L1, so it won't trigger |
| 28 | * any such event after this point in time. |
| 29 | */ |
| 30 | __builtin_bfin_ssync(); |
| 31 | |
Mike Frysinger | ca49bec | 2008-10-11 21:49:06 -0400 | [diff] [blame] | 32 | /* The bootrom checks to see how it was reset and will |
| 33 | * automatically perform a software reset for us when |
| 34 | * it starts executing after the core reset. |
| 35 | */ |
| 36 | if (ANOMALY_05000353 || ANOMALY_05000386) { |
Mike Frysinger | 94bae5c | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 37 | /* Initiate System software reset. */ |
| 38 | bfin_write_SWRST(0x7); |
| 39 | |
| 40 | /* Due to the way reset is handled in the hardware, we need |
Mike Frysinger | ca49bec | 2008-10-11 21:49:06 -0400 | [diff] [blame] | 41 | * to delay for 10 SCLKS. The only reliable way to do this is |
| 42 | * to calculate the CCLK/SCLK ratio and multiply 10. For now, |
Mike Frysinger | 94bae5c | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 43 | * we'll assume worse case which is a 1:15 ratio. |
| 44 | */ |
| 45 | asm( |
| 46 | "LSETUP (1f, 1f) LC0 = %0\n" |
| 47 | "1: nop;" |
| 48 | : |
Mike Frysinger | ca49bec | 2008-10-11 21:49:06 -0400 | [diff] [blame] | 49 | : "a" (15 * 10) |
Mike Frysinger | 94bae5c | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 50 | : "LC0", "LB0", "LT0" |
| 51 | ); |
| 52 | |
| 53 | /* Clear System software reset */ |
| 54 | bfin_write_SWRST(0); |
| 55 | |
Mike Frysinger | ca49bec | 2008-10-11 21:49:06 -0400 | [diff] [blame] | 56 | /* The BF526 ROM will crash during reset */ |
| 57 | #if defined(__ADSPBF522__) || defined(__ADSPBF524__) || defined(__ADSPBF526__) |
| 58 | bfin_read_SWRST(); |
| 59 | #endif |
| 60 | |
Mike Frysinger | 94bae5c | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 61 | /* Wait for the SWRST write to complete. Cannot rely on SSYNC |
| 62 | * though as the System state is all reset now. |
| 63 | */ |
| 64 | asm( |
| 65 | "LSETUP (1f, 1f) LC1 = %0\n" |
| 66 | "1: nop;" |
| 67 | : |
| 68 | : "a" (15 * 1) |
| 69 | : "LC1", "LB1", "LT1" |
| 70 | ); |
Mike Frysinger | ca49bec | 2008-10-11 21:49:06 -0400 | [diff] [blame] | 71 | } |
Mike Frysinger | 94bae5c | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 72 | |
Mike Frysinger | ca49bec | 2008-10-11 21:49:06 -0400 | [diff] [blame] | 73 | while (1) |
Mike Frysinger | 94bae5c | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 74 | /* Issue core reset */ |
| 75 | asm("raise 1"); |
Mike Frysinger | 94bae5c | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 76 | } |
| 77 | |
| 78 | /* We need to trampoline ourselves up into L1 since our linker |
| 79 | * does not have relaxtion support and will only generate a |
| 80 | * PC relative call with a 25 bit immediate. This is not enough |
| 81 | * to get us from the top of SDRAM into L1. |
| 82 | */ |
Kyle Moffett | 2d219a8 | 2011-03-07 12:37:30 -0500 | [diff] [blame] | 83 | int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
Mike Frysinger | 94bae5c | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 84 | { |
| 85 | if (board_reset) |
| 86 | board_reset(); |
| 87 | while (1) |
| 88 | asm("jump (%0);" : : "a" (bfin_reset)); |
Mike Frysinger | 94bae5c | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 89 | return 0; |
| 90 | } |