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git01.mediatek.com / filogic / uboot / 35cb2a4c87728466c01258d50cccafe2cbe5f718 / . / configs / x530_defconfig
blob: a15b0b46b47eab970f50b34d214818b98585ee3b [file] [log] [blame]
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]1CONFIG_ARM=y
Adam Fordd36b1022019-08-14 08:29:25 -0500[diff] [blame]2CONFIG_ARCH_CPU_INIT=y
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]3CONFIG_ARCH_MVEBU=y
4CONFIG_SYS_TEXT_BASE=0x00800000
5CONFIG_SPL_LIBCOMMON_SUPPORT=y
6CONFIG_SPL_LIBGENERIC_SUPPORT=y
7CONFIG_SYS_MALLOC_F_LEN=0x2000
8CONFIG_TARGET_X530=y
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]9CONFIG_ENV_SIZE=0x10000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]10CONFIG_ENV_SECT_SIZE=0x40000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]11CONFIG_ENV_OFFSET=0x100000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]12CONFIG_DM_GPIO=y
13CONFIG_SPL_SERIAL_SUPPORT=y
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame]14CONFIG_NR_DRAM_BANKS=2
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]15CONFIG_SPL=y
16CONFIG_DEBUG_UART_BASE=0xd0012000
17CONFIG_DEBUG_UART_CLOCK=250000000
18CONFIG_SPL_SPI_FLASH_SUPPORT=y
19CONFIG_SPL_SPI_SUPPORT=y
20CONFIG_DEBUG_UART=y
Tom Rini527ded82019-09-23 11:47:37 -0400[diff] [blame]21CONFIG_SPL_TEXT_BASE=0x40000030
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]22CONFIG_FIT=y
23CONFIG_FIT_VERBOSE=y
24CONFIG_SILENT_CONSOLE=y
25CONFIG_SILENT_U_BOOT_ONLY=y
26CONFIG_SILENT_CONSOLE_UPDATE_ON_RELOC=y
27CONFIG_MISC_INIT_R=y
Chris Packham17ca1432019-02-18 10:30:54 +1300[diff] [blame]28CONFIG_SPL_BOARD_INIT=y
Hannes Schmelzer80db75f2019-08-22 15:41:45 +0200[diff] [blame]29CONFIG_SPL_SPI_LOAD=y
Hannes Schmelzer38df9972019-08-22 15:41:46 +0200[diff] [blame]30CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
Chris Packham17ca1432019-02-18 10:30:54 +1300[diff] [blame]31CONFIG_SPL_WATCHDOG_SUPPORT=y
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]32CONFIG_CMD_MEMINFO=y
33# CONFIG_CMD_FLASH is not set
34CONFIG_CMD_GPIO=y
35CONFIG_CMD_I2C=y
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]36CONFIG_CMD_SPI=y
37CONFIG_CMD_USB=y
38# CONFIG_CMD_SETEXPR is not set
39CONFIG_CMD_DHCP=y
40CONFIG_CMD_TFTPPUT=y
41CONFIG_CMD_MII=y
42CONFIG_CMD_PING=y
43CONFIG_CMD_CACHE=y
44CONFIG_CMD_TIME=y
45CONFIG_CMD_EXT2=y
46CONFIG_CMD_EXT4=y
47CONFIG_CMD_FAT=y
48CONFIG_CMD_FS_GENERIC=y
49CONFIG_DEFAULT_DEVICE_TREE="armada-385-atl-x530"
50CONFIG_ENV_IS_IN_SPI_FLASH=y
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]51CONFIG_ENV_ADDR=0x100000
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]52CONFIG_SPL_OF_TRANSLATE=y
53CONFIG_BLK=y
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]54CONFIG_DM_I2C=y
55CONFIG_SYS_I2C_MVTWSI=y
56CONFIG_I2C_MUX=y
57CONFIG_I2C_MUX_PCA954x=y
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]58# CONFIG_MMC is not set
Miquel Raynal2e35dbb2019-10-03 19:50:05 +0200[diff] [blame]59CONFIG_MTD=y
Miquel Raynald0935362019-10-03 19:50:03 +0200[diff] [blame]60CONFIG_MTD_RAW_NAND=y
Stefan Roese23b37f92019-08-22 12:28:04 +0200[diff] [blame]61CONFIG_SYS_NAND_USE_FLASH_BBT=y
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]62CONFIG_NAND_PXA3XX=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]63CONFIG_SF_DEFAULT_BUS=1
64CONFIG_SF_DEFAULT_SPEED=50000000
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]65CONFIG_SPI_FLASH_BAR=y
66CONFIG_SPI_FLASH_MACRONIX=y
67CONFIG_SPI_FLASH_STMICRO=y
68CONFIG_SPI_FLASH_SST=y
69CONFIG_MTD_UBI=y
70CONFIG_PCI=y
Stefan Roese3179ec62019-01-25 11:52:43 +0100[diff] [blame]71CONFIG_DM_PCI_COMPAT=y
72CONFIG_PCI_MVEBU=y
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]73CONFIG_DM_RTC=y
74CONFIG_RTC_DS1307=y
75CONFIG_DEBUG_UART_SHIFT=2
76CONFIG_SYS_NS16550=y
77CONFIG_KIRKWOOD_SPI=y
78CONFIG_USB=y
79CONFIG_DM_USB=y
80CONFIG_USB_EHCI_HCD=y
81CONFIG_USB_STORAGE=y
82CONFIG_USB_HOST_ETHER=y
83CONFIG_USB_ETHER_ASIX=y
84CONFIG_USB_ETHER_ASIX88179=y
Chris Packham17ca1432019-02-18 10:30:54 +1300[diff] [blame]85CONFIG_WDT=y
86CONFIG_WDT_ORION=y