Stephen Warren | 57ab23f | 2013-02-26 12:28:29 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. |
| 3 | * |
Tom Rini | e237880 | 2016-01-14 22:05:13 -0500 | [diff] [blame] | 4 | * SPDX-License-Identifier: GPL-2.0 |
Stephen Warren | 57ab23f | 2013-02-26 12:28:29 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __MX6_COMMON_H |
| 8 | #define __MX6_COMMON_H |
| 9 | |
Stefan Agner | be8b7c5 | 2018-01-05 15:08:19 +0100 | [diff] [blame] | 10 | #if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)) |
| 11 | #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ |
| 12 | #define COUNTER_FREQUENCY CONFIG_SC_TIMER_CLK |
| 13 | #else |
Fabio Estevam | 1340929 | 2014-01-29 17:39:49 -0200 | [diff] [blame] | 14 | #ifndef CONFIG_SYS_L2CACHE_OFF |
| 15 | #define CONFIG_SYS_L2_PL310 |
| 16 | #define CONFIG_SYS_PL310_BASE L2_PL310_BASE |
| 17 | #endif |
| 18 | |
Gabriel Huau | 170ceaf | 2014-07-26 11:35:43 -0700 | [diff] [blame] | 19 | #define CONFIG_MP |
Peng Fan | d2d4fcb | 2015-07-20 19:28:26 +0800 | [diff] [blame] | 20 | #endif |
| 21 | #define CONFIG_BOARD_POSTCLK_INIT |
Ye.Li | 2b7f877 | 2014-10-30 18:20:59 +0800 | [diff] [blame] | 22 | #define CONFIG_MXC_GPT_HCLK |
Gabriel Huau | 170ceaf | 2014-07-26 11:35:43 -0700 | [diff] [blame] | 23 | |
Peng Fan | 3783b9b | 2016-01-04 15:27:22 +0800 | [diff] [blame] | 24 | #define CONFIG_SYS_BOOTM_LEN 0x1000000 |
| 25 | |
Peter Robinson | 4b67150 | 2015-05-22 17:30:45 +0100 | [diff] [blame] | 26 | #include <linux/sizes.h> |
| 27 | #include <asm/arch/imx-regs.h> |
Stefano Babic | 33731bc | 2017-06-29 10:16:06 +0200 | [diff] [blame] | 28 | #include <asm/mach-imx/gpio.h> |
Peter Robinson | 4b67150 | 2015-05-22 17:30:45 +0100 | [diff] [blame] | 29 | |
Peter Robinson | e193ff2 | 2015-05-22 17:30:46 +0100 | [diff] [blame] | 30 | #ifndef CONFIG_MX6 |
| 31 | #define CONFIG_MX6 |
| 32 | #endif |
| 33 | |
Gong Qianyu | 52de2e5 | 2015-10-26 19:47:42 +0800 | [diff] [blame] | 34 | #define CONFIG_SYS_FSL_CLK |
Peter Robinson | e193ff2 | 2015-05-22 17:30:46 +0100 | [diff] [blame] | 35 | |
Peter Robinson | 3028f62 | 2015-05-22 17:30:47 +0100 | [diff] [blame] | 36 | /* ATAGs */ |
| 37 | #define CONFIG_CMDLINE_TAG |
| 38 | #define CONFIG_SETUP_MEMORY_TAGS |
| 39 | #define CONFIG_INITRD_TAG |
| 40 | #define CONFIG_REVISION_TAG |
| 41 | |
Peter Robinson | 490a61e | 2015-05-22 17:30:49 +0100 | [diff] [blame] | 42 | /* Boot options */ |
Fabio Estevam | 1b691df | 2018-01-03 12:33:05 -0200 | [diff] [blame] | 43 | #if defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \ |
| 44 | defined(CONFIG_MX6SX) || \ |
| 45 | defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) |
Fabio Estevam | 8c717e5 | 2015-05-28 12:33:34 -0300 | [diff] [blame] | 46 | #define CONFIG_LOADADDR 0x82000000 |
| 47 | #ifndef CONFIG_SYS_TEXT_BASE |
| 48 | #define CONFIG_SYS_TEXT_BASE 0x87800000 |
| 49 | #endif |
| 50 | #else |
Peter Robinson | 490a61e | 2015-05-22 17:30:49 +0100 | [diff] [blame] | 51 | #define CONFIG_LOADADDR 0x12000000 |
Peter Robinson | 490a61e | 2015-05-22 17:30:49 +0100 | [diff] [blame] | 52 | #ifndef CONFIG_SYS_TEXT_BASE |
| 53 | #define CONFIG_SYS_TEXT_BASE 0x17800000 |
| 54 | #endif |
Fabio Estevam | 8c717e5 | 2015-05-28 12:33:34 -0300 | [diff] [blame] | 55 | #endif |
| 56 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
| 57 | |
Peter Robinson | 61a1b9d | 2015-05-22 17:30:50 +0100 | [diff] [blame] | 58 | /* allow to overwrite serial and ethaddr */ |
| 59 | #define CONFIG_ENV_OVERWRITE |
| 60 | #define CONFIG_CONS_INDEX 1 |
Peter Robinson | 61a1b9d | 2015-05-22 17:30:50 +0100 | [diff] [blame] | 61 | |
Peter Robinson | f320d70 | 2015-05-22 17:30:51 +0100 | [diff] [blame] | 62 | /* Filesystems and image support */ |
Peter Robinson | f320d70 | 2015-05-22 17:30:51 +0100 | [diff] [blame] | 63 | #define CONFIG_SUPPORT_RAW_INITRD |
Peter Robinson | f320d70 | 2015-05-22 17:30:51 +0100 | [diff] [blame] | 64 | |
Peter Robinson | 61a1b9d | 2015-05-22 17:30:50 +0100 | [diff] [blame] | 65 | /* Miscellaneous configurable options */ |
Peter Robinson | 61a1b9d | 2015-05-22 17:30:50 +0100 | [diff] [blame] | 66 | #define CONFIG_SYS_LONGHELP |
Peter Robinson | 61a1b9d | 2015-05-22 17:30:50 +0100 | [diff] [blame] | 67 | #define CONFIG_CMDLINE_EDITING |
| 68 | #define CONFIG_AUTO_COMPLETE |
| 69 | #define CONFIG_SYS_CBSIZE 512 |
| 70 | #define CONFIG_SYS_MAXARGS 32 |
Peter Robinson | 61a1b9d | 2015-05-22 17:30:50 +0100 | [diff] [blame] | 71 | |
Peter Robinson | a0e6379 | 2015-05-22 17:30:48 +0100 | [diff] [blame] | 72 | /* GPIO */ |
| 73 | #define CONFIG_MXC_GPIO |
Peter Robinson | a0e6379 | 2015-05-22 17:30:48 +0100 | [diff] [blame] | 74 | |
Peter Robinson | be6c5f1 | 2015-05-22 17:30:52 +0100 | [diff] [blame] | 75 | /* MMC */ |
Peter Robinson | be6c5f1 | 2015-05-22 17:30:52 +0100 | [diff] [blame] | 76 | #define CONFIG_BOUNCE_BUFFER |
| 77 | #define CONFIG_FSL_ESDHC |
| 78 | #define CONFIG_FSL_USDHC |
| 79 | |
Peter Robinson | b596732 | 2015-06-24 17:09:46 +0100 | [diff] [blame] | 80 | /* Fuses */ |
Peter Robinson | b596732 | 2015-06-24 17:09:46 +0100 | [diff] [blame] | 81 | #define CONFIG_MXC_OCOTP |
| 82 | |
Gary Bisson | 70466e4 | 2016-08-25 19:03:18 +0200 | [diff] [blame] | 83 | /* Secure boot (HAB) support */ |
| 84 | #ifdef CONFIG_SECURE_BOOT |
| 85 | #define CONFIG_CSF_SIZE 0x2000 |
Sven Ebenfeld | eba5e33 | 2016-11-06 16:37:55 +0100 | [diff] [blame] | 86 | #ifdef CONFIG_SPL_BUILD |
| 87 | #define CONFIG_SPL_DRIVERS_MISC_SUPPORT |
| 88 | #endif |
Gary Bisson | 70466e4 | 2016-08-25 19:03:18 +0200 | [diff] [blame] | 89 | #endif |
| 90 | |
Stephen Warren | 57ab23f | 2013-02-26 12:28:29 +0000 | [diff] [blame] | 91 | #endif |