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Lokesh Vutla1a9dd212019-06-13 10:29:49 +05301/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Configuration header file for K3 J721E EVM
4 *
5 * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/
6 * Lokesh Vutla <lokeshvutla@ti.com>
7 */
8
9#ifndef __CONFIG_J721E_EVM_H
10#define __CONFIG_J721E_EVM_H
11
12#include <linux/sizes.h>
13#include <config_distro_bootcmd.h>
14#include <environment/ti/mmc.h>
15
16#define CONFIG_ENV_SIZE (128 << 10)
17
18/* DDR Configuration */
19#define CONFIG_SYS_SDRAM_BASE1 0x880000000
20
21/* SPL Loader Configuration */
22#ifdef CONFIG_TARGET_J721E_A72_EVM
23#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + \
24 CONFIG_SYS_K3_NON_SECURE_MSRAM_SIZE)
Lokesh Vutla1a9dd212019-06-13 10:29:49 +053025#else
26/*
27 * Maximum size in memory allocated to the SPL BSS. Keep it as tight as
28 * possible (to allow the build to go through), as this directly affects
29 * our memory footprint. The less we use for BSS the more we have available
30 * for everything else.
31 */
32#define CONFIG_SPL_BSS_MAX_SIZE 0xA000
33/*
34 * Link BSS to be within SPL in a dedicated region located near the top of
35 * the MCU SRAM, this way making it available also before relocation. Note
36 * that we are not using the actual top of the MCU SRAM as there is a memory
37 * location filled in by the boot ROM that we want to read out without any
38 * interference from the C context.
39 */
40#define CONFIG_SPL_BSS_START_ADDR (CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX -\
41 CONFIG_SPL_BSS_MAX_SIZE)
42/* Set the stack right below the SPL BSS section */
43#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_BSS_START_ADDR
44/* Configure R5 SPL post-relocation malloc pool in DDR */
45#define CONFIG_SYS_SPL_MALLOC_START 0x84000000
46#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M
Lokesh Vutla1a9dd212019-06-13 10:29:49 +053047#endif
48
49#ifdef CONFIG_SYS_K3_SPL_ATF
50#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "tispl.bin"
51#endif
52
53#define CONFIG_SPL_MAX_SIZE CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE
54
55#define CONFIG_SYS_BOOTM_LEN SZ_64M
56#define CONFIG_CQSPI_REF_CLK 133333333
57
58/* U-Boot general configuration */
59#define EXTRA_ENV_J721E_BOARD_SETTINGS \
60 "default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
Andrew F. Davis685fb742019-08-12 15:59:53 -040061 "findfdt=setenv fdtfile ${default_device_tree}\0" \
Lokesh Vutla1a9dd212019-06-13 10:29:49 +053062 "loadaddr=0x80080000\0" \
63 "fdtaddr=0x82000000\0" \
64 "overlayaddr=0x83000000\0" \
65 "name_kern=Image\0" \
66 "console=ttyS2,115200n8\0" \
67 "args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000\0" \
68 "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0"
69
70/* U-Boot MMC-specific configuration */
71#define EXTRA_ENV_J721E_BOARD_SETTINGS_MMC \
72 "boot=mmc\0" \
73 "mmcdev=1\0" \
74 "bootpart=1:2\0" \
75 "bootdir=/boot\0" \
76 "rd_spec=-\0" \
77 "init_mmc=run args_all args_mmc\0" \
78 "get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
79 "get_overlay_mmc=" \
80 "fdt address ${fdtaddr};" \
81 "fdt resize 0x100000;" \
Andrew F. Davis685fb742019-08-12 15:59:53 -040082 "for overlay in $name_overlays;" \
Lokesh Vutla1a9dd212019-06-13 10:29:49 +053083 "do;" \
84 "load mmc ${bootpart} ${overlayaddr} ${bootdir}/${overlay} && " \
85 "fdt apply ${overlayaddr};" \
86 "done;\0" \
87 "get_kern_mmc=load mmc ${bootpart} ${loadaddr} " \
88 "${bootdir}/${name_kern}\0"
89
90/* Incorporate settings into the U-Boot environment */
91#define CONFIG_EXTRA_ENV_SETTINGS \
92 DEFAULT_MMC_TI_ARGS \
93 EXTRA_ENV_J721E_BOARD_SETTINGS \
94 EXTRA_ENV_J721E_BOARD_SETTINGS_MMC
95
96/* Now for the remaining common defines */
97#include <configs/ti_armv7_common.h>
98
99#endif /* __CONFIG_J721E_EVM_H */