blob: 04192d86b7007e3828e8084450ff6dfcdfe6712f [file] [log] [blame]
Mario Six3e67cb22019-01-21 09:18:23 +01001/*
2 * Internal Definitions
3 */
Simon Glassfb64e362020-05-10 11:40:09 -06004#include <linux/stringify.h>
Mario Six3e67cb22019-01-21 09:18:23 +01005#define BOOTFLASH_START 0xF0000000
6
Mario Six3e67cb22019-01-21 09:18:23 +01007/*
8 * DDR Setup
9 */
10#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */
11#define CONFIG_SYS_SDRAM_BASE2 (CONFIG_SYS_SDRAM_BASE + 0x10000000) /* +256M */
12
13#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \
14 DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
15
16#define CFG_83XX_DDR_USES_CS0
17
18/*
19 * Manually set up DDR parameters
20 */
Tom Rini2f05fef2022-07-23 13:04:56 -040021#define CONFIG_SYS_SDRAM_SIZE 0x80000000 /* 2048 MiB */
Mario Six3e67cb22019-01-21 09:18:23 +010022
23/*
24 * The reserved memory
25 */
Mario Six3e67cb22019-01-21 09:18:23 +010026#define CONFIG_SYS_FLASH_BASE 0xF0000000
27
Mario Six3e67cb22019-01-21 09:18:23 +010028/* Reserve 768 kB for Mon */
29#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
30
31/*
32 * Initial RAM Base Address Setup
33 */
34#define CONFIG_SYS_INIT_RAM_LOCK
35#define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */
36#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in RAM */
Mario Six3e67cb22019-01-21 09:18:23 +010037/*
38 * Init Local Bus Memory Controller:
39 *
40 * Bank Bus Machine PortSz Size Device
41 * ---- --- ------- ------ ----- ------
42 * 0 Local GPCM 16 bit 256MB FLASH
43 * 1 Local GPCM 8 bit 128MB GPIO/PIGGY
44 *
45 */
46
47/*
48 * FLASH on the Local Bus
49 */
50#define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */
51
Mario Six3e67cb22019-01-21 09:18:23 +010052#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
53
Mario Six3e67cb22019-01-21 09:18:23 +010054/* I2C */
Mario Six3e67cb22019-01-21 09:18:23 +010055#define CONFIG_SYS_NUM_I2C_BUSES 4
56#define CONFIG_SYS_I2C_MAX_HOPS 1
Mario Six3e67cb22019-01-21 09:18:23 +010057#define CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP} }, \
58 {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
59 {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
60 {1, {I2C_NULL_HOP} } }
61
Mario Six3e67cb22019-01-21 09:18:23 +010062#if defined(CONFIG_CMD_NAND)
63#define CONFIG_NAND_KMETER1
64#define CONFIG_SYS_MAX_NAND_DEVICE 1
65#define CONFIG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE
66#endif
67
68/*
69 * For booting Linux, the board info and command line data
70 * have to be in the first 8 MB of memory, since this is
71 * the maximum mapped by the Linux kernel during initialization.
72 */
73#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
74
75/*
76 * Environment
77 */
78
Mario Six3e67cb22019-01-21 09:18:23 +010079/*
80 * Environment Configuration
81 */
Mario Six3e67cb22019-01-21 09:18:23 +010082#ifndef CONFIG_KM_DEF_ENV /* if not set by keymile-common.h */
83#define CONFIG_KM_DEF_ENV "km-common=empty\0"
84#endif
85
86#ifndef CONFIG_KM_DEF_ARCH
87#define CONFIG_KM_DEF_ARCH "arch=ppc_82xx\0"
88#endif
89
90#define CONFIG_EXTRA_ENV_SETTINGS \
91 CONFIG_KM_DEF_ENV \
92 CONFIG_KM_DEF_ARCH \
93 "newenv=" \
94 "prot off " __stringify(CONFIG_ENV_ADDR) " +0x40000 && " \
95 "era " __stringify(CONFIG_ENV_ADDR) " +0x40000\0" \
96 "unlock=yes\0" \
97 ""
98
Mario Six3e67cb22019-01-21 09:18:23 +010099/*
100 * QE UEC ethernet configuration
101 */
102#define CONFIG_UEC_ETH