Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 3509c4ff981b6c7af5418c3c9aa330350e66a713 / . / configs / socfpga_secu1_defconfig
blob: 27d3a47b086ca147b6c1cd3340a8c11df4aa939f [file] [log] [blame]
Holger Brunckddef8892020-02-19 19:55:14 +0100[diff] [blame]1CONFIG_ARM=y
Philip Oberfichtner5833e1b2022-08-17 15:07:12 +0200[diff] [blame]2CONFIG_SYS_L2_PL310=y
Holger Brunckddef8892020-02-19 19:55:14 +0100[diff] [blame]3CONFIG_ARCH_SOCFPGA=y
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]4CONFIG_SYS_MALLOC_LEN=0x4000000
Holger Brunckddef8892020-02-19 19:55:14 +0100[diff] [blame]5CONFIG_SYS_MALLOC_F_LEN=0x800
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]6CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
7CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000
Holger Brunck9a9b1512022-12-02 18:22:40 +0100[diff] [blame]8CONFIG_ENV_SIZE=0x2000
Holger Brunckddef8892020-02-19 19:55:14 +0100[diff] [blame]9CONFIG_ENV_OFFSET=0x100000
10CONFIG_DM_GPIO=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]11CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_secu1"
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]12CONFIG_SPL_TEXT_BASE=0xFFFF0000
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]13CONFIG_DM_RESET=y
Simon Glassb58bfe02021-08-08 12:20:09 -0600[diff] [blame]14# CONFIG_SPL_MMC is not set
Simon Glass284cb9c2021-07-10 21:14:31 -0600[diff] [blame]15CONFIG_SPL_DRIVERS_MISC=y
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]16CONFIG_SPL_STACK=0x0
Holger Brunckddef8892020-02-19 19:55:14 +0100[diff] [blame]17CONFIG_TARGET_SOCFPGA_ARRIA5_SECU1=y
18CONFIG_ENV_OFFSET_REDUND=0x120000
19# CONFIG_SPL_LIBDISK_SUPPORT is not set
Simon Glassa5820472021-08-08 12:20:14 -0600[diff] [blame]20# CONFIG_SPL_SPI is not set
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]21CONFIG_SYS_LOAD_ADDR=0x02000000
Holger Brunckddef8892020-02-19 19:55:14 +0100[diff] [blame]22CONFIG_BUILD_TARGET="u-boot-with-nand-spl.sfp"
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]23CONFIG_DISTRO_DEFAULTS=y
Holger Brunckddef8892020-02-19 19:55:14 +0100[diff] [blame]24CONFIG_FIT=y
Tom Rinia45a3ef2022-03-11 09:12:04 -0500[diff] [blame]25CONFIG_BOOT_RETRY=y
26CONFIG_BOOT_RETRY_TIME=45
27CONFIG_RESET_TO_RETRY=y
Tom Rini97faf612020-06-16 19:06:12 -0400[diff] [blame]28CONFIG_USE_BOOTARGS=y
Tom Rini5ddf1722021-11-10 09:11:40 -0500[diff] [blame]29CONFIG_BOOTCOMMAND="setenv bootcmd 'bridge enable; if test ${bootnum} = 'b'; then run _fpga_loadsafe; else if test ${bootcount} -eq 4; then echo 'Switching copy...'; setexpr x $bootnum % 2 && setexpr bootnum $x + 1; saveenv; fi; run _fpga_loaduser; fi;echo 'Booting bank $bootnum' && run userload && run userboot;' && setenv altbootcmd 'setenv bootnum b && saveenv && boot;' && saveenv && saveenv && boot;"
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]30CONFIG_DEFAULT_FDT_FILE="socfpga_arria5_secu1.dtb"
Holger Brunckddef8892020-02-19 19:55:14 +0100[diff] [blame]31CONFIG_SYS_CONSOLE_IS_IN_ENV=y
32CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
33CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
Holger Brunckddef8892020-02-19 19:55:14 +0100[diff] [blame]34# CONFIG_DISPLAY_BOARDINFO is not set
35CONFIG_DISPLAY_BOARDINFO_LATE=y
Tom Rini2bfc77a2022-03-23 17:20:08 -0400[diff] [blame]36CONFIG_CLOCKS=y
Tom Rini3faebfb2021-11-07 22:59:41 -0500[diff] [blame]37CONFIG_MISC_INIT_R=y
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]38CONFIG_SPL_PAD_TO=0x10000
Tom Rini0cb89e72022-05-19 15:09:22 -0400[diff] [blame]39CONFIG_SPL_NO_BSS_LIMIT=y
Holger Brunckddef8892020-02-19 19:55:14 +0100[diff] [blame]40CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y
Tom Rini8a14ac42022-05-26 13:13:21 -0400[diff] [blame]41# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
Holger Brunckddef8892020-02-19 19:55:14 +0100[diff] [blame]42# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]43CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1
44# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE is not set
Holger Brunckddef8892020-02-19 19:55:14 +0100[diff] [blame]45CONFIG_SPL_MTD_SUPPORT=y
Tom Rini0a83cc22022-06-10 23:03:09 -0400[diff] [blame]46CONFIG_SPL_NAND_SUPPORT=y
Tom Riniba5c2b02022-05-11 16:21:06 -0400[diff] [blame]47CONFIG_SYS_MAXARGS=32
Tom Rinif3c2f992022-06-25 19:29:46 -0400[diff] [blame]48CONFIG_SYS_BOOTM_LEN=0x4000000
Holger Brunckddef8892020-02-19 19:55:14 +0100[diff] [blame]49CONFIG_CMD_ASKENV=y
50CONFIG_CMD_GREPENV=y
51CONFIG_CMD_EEPROM=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]52CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
53CONFIG_SYS_EEPROM_SIZE=1024
Holger Brunckddef8892020-02-19 19:55:14 +0100[diff] [blame]54# CONFIG_CMD_FLASH is not set
55CONFIG_CMD_GPIO=y
56CONFIG_CMD_I2C=y
57CONFIG_CMD_MMC=y
58CONFIG_CMD_NAND_TRIMFFS=y
59CONFIG_CMD_SPI=y
60CONFIG_CMD_WDT=y
61CONFIG_CMD_CACHE=y
62CONFIG_MTDIDS_DEFAULT="nand0=denali-nand"
63CONFIG_MTDPARTS_DEFAULT="mtdparts=denali-nand:512k(nand.4spl),512k(nand.uboot),128k(nand.env1),128k(nand.env2),0x1000000(nand.rec),0x3ee40000(nand.ubi),0x80000@0x3ff80000(nand.bbt)"
64CONFIG_CMD_UBI=y
65# CONFIG_CMD_UBIFS is not set
66# CONFIG_ISO_PARTITION is not set
67# CONFIG_EFI_PARTITION is not set
Holger Brunck9a9b1512022-12-02 18:22:40 +0100[diff] [blame]68CONFIG_ENV_SOURCE_FILE="socfpga_secu"
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]69CONFIG_ENV_OVERWRITE=y
Holger Brunckddef8892020-02-19 19:55:14 +0100[diff] [blame]70CONFIG_ENV_IS_IN_NAND=y
71CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
Tom Rini5fb860c2022-02-25 11:19:48 -0500[diff] [blame]72CONFIG_USE_BOOTFILE=y
73CONFIG_BOOTFILE="zImage"
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]74CONFIG_VERSION_VARIABLE=y
Holger Brunckddef8892020-02-19 19:55:14 +0100[diff] [blame]75CONFIG_SPL_DM_SEQ_ALIAS=y
76# CONFIG_SPL_BLK is not set
Marek Vasut3a649682020-03-06 21:52:21 +0100[diff] [blame]77CONFIG_BOOTCOUNT_LIMIT=y
78CONFIG_DM_BOOTCOUNT=y
79CONFIG_DM_BOOTCOUNT_RTC=y
Holger Brunckddef8892020-02-19 19:55:14 +0100[diff] [blame]80CONFIG_DWAPB_GPIO=y
81CONFIG_DM_I2C=y
82CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
83CONFIG_DM_I2C_GPIO=y
84CONFIG_MISC=y
85CONFIG_I2C_EEPROM=y
86CONFIG_SYS_I2C_EEPROM_ADDR=0x50
Tom Rini91735482022-10-28 20:27:05 -0400[diff] [blame]87CONFIG_SYS_MMC_MAX_BLK_COUNT=256
Holger Brunckddef8892020-02-19 19:55:14 +0100[diff] [blame]88CONFIG_MMC_DW=y
89CONFIG_MTD=y
90CONFIG_DM_MTD=y
91CONFIG_MTD_RAW_NAND=y
92CONFIG_SYS_NAND_USE_FLASH_BBT=y
93CONFIG_NAND_DENALI_DT=y
Tom Rinifdae0072021-09-22 14:50:34 -0400[diff] [blame]94CONFIG_SYS_NAND_ONFI_DETECTION=y
Tom Rini1cf7c412021-09-22 14:50:38 -0400[diff] [blame]95CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
96CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
Holger Brunckddef8892020-02-19 19:55:14 +0100[diff] [blame]97CONFIG_SPL_NAND_DENALI=y
Tom Rini63683ef2020-05-26 08:32:25 -0400[diff] [blame]98CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=2
Holger Brunckddef8892020-02-19 19:55:14 +0100[diff] [blame]99# CONFIG_DM_SPI_FLASH is not set
100CONFIG_MTD_UBI_FASTMAP=y
101CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
102CONFIG_MV88E6352_SWITCH=y
103CONFIG_PHY_FIXED=y
Holger Brunckddef8892020-02-19 19:55:14 +0100[diff] [blame]104CONFIG_PHY_GIGE=y
105CONFIG_ETH_DESIGNWARE=y
106CONFIG_MII=y
Marek Vasut3a649682020-03-06 21:52:21 +0100[diff] [blame]107CONFIG_DM_RTC=y
108CONFIG_RTC_M41T62=y
Holger Brunckddef8892020-02-19 19:55:14 +0100[diff] [blame]109CONFIG_SPI=y
110CONFIG_SPI_MEM=y
111CONFIG_DESIGNWARE_SPI=y
Tom Rini3e6a35b2021-12-12 22:12:28 -0500[diff] [blame]112CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
Holger Brunckddef8892020-02-19 19:55:14 +0100[diff] [blame]113CONFIG_DESIGNWARE_WATCHDOG=y
114CONFIG_WDT=y
Tom Rini1f173632022-11-16 13:10:38 -0500[diff] [blame]115CONFIG_SYS_TIMER_COUNTS_DOWN=y
Holger Brunckddef8892020-02-19 19:55:14 +0100[diff] [blame]116# CONFIG_GZIP is not set