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wdenkbb1b8262003-03-27 12:09:35 +00001/*
wdenk8d5d28a2005-04-02 22:37:54 +00002 * (C) Copyright 2003-2005
wdenkbb1b8262003-03-27 12:09:35 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenkbb1b8262003-03-27 12:09:35 +00006 */
7
8/*
9 * This file contains the configuration parameters for the INCA-IP board.
10 */
11
12#ifndef __CONFIG_H
13#define __CONFIG_H
14
wdenkbb1b8262003-03-27 12:09:35 +000015#define CONFIG_INCA_IP 1 /* on a INCA-IP Board */
16
Daniel Schwierzeckc56514c2011-07-27 13:22:36 +020017#define CONFIG_XWAY_SWAP_BYTES
18
Shinya Kuribayashi9b844372011-02-05 18:33:36 +090019/*
20 * Clock for the MIPS core (MHz)
21 * allowed values: 100000000, 133000000, and 150000000 (default)
22 */
23#ifndef CONFIG_CPU_CLOCK_RATE
24#define CONFIG_CPU_CLOCK_RATE 150000000
wdenk5d841732003-08-17 18:55:18 +000025#endif
wdenkbb1b8262003-03-27 12:09:35 +000026
Daniel Schwierzeck6ff8ae02011-07-27 13:22:37 +020027#define CONFIG_SYS_XWAY_EBU_BOOTCFG 0x40C4 /* CMULT = 8 */
wdenkbb1b8262003-03-27 12:09:35 +000028
wdenkb02744a2003-04-05 00:53:31 +000029#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
wdenkbb1b8262003-03-27 12:09:35 +000030
wdenkb02744a2003-04-05 00:53:31 +000031#define CONFIG_BAUDRATE 115200
wdenkbb1b8262003-03-27 12:09:35 +000032
wdenkb02744a2003-04-05 00:53:31 +000033#define CONFIG_TIMESTAMP /* Print image info with timestamp */
34
35#define CONFIG_PREBOOT "echo;" \
Wolfgang Denk1baed662008-03-03 12:16:44 +010036 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
wdenkb02744a2003-04-05 00:53:31 +000037 "echo"
38
39#undef CONFIG_BOOTARGS
40
41#define CONFIG_EXTRA_ENV_SETTINGS \
42 "nfsargs=setenv bootargs root=/dev/nfs rw " \
Wolfgang Denk86eb3b72005-11-20 21:40:11 +010043 "nfsroot=${serverip}:${rootpath}\0" \
wdenkb02744a2003-04-05 00:53:31 +000044 "ramargs=setenv bootargs root=/dev/ram rw\0" \
Wolfgang Denk86eb3b72005-11-20 21:40:11 +010045 "addip=setenv bootargs ${bootargs} " \
46 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
47 ":${hostname}:${netdev}:off\0" \
48 "addmisc=setenv bootargs ${bootargs} " \
49 "console=ttyS0,${baudrate} " \
50 "ethaddr=${ethaddr} " \
wdenkb02744a2003-04-05 00:53:31 +000051 "panic=1\0" \
52 "flash_nfs=run nfsargs addip addmisc;" \
Wolfgang Denk86eb3b72005-11-20 21:40:11 +010053 "bootm ${kernel_addr}\0" \
wdenkb02744a2003-04-05 00:53:31 +000054 "flash_self=run ramargs addip addmisc;" \
Wolfgang Denk86eb3b72005-11-20 21:40:11 +010055 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
56 "net_nfs=tftp 80500000 ${bootfile};" \
wdenkb02744a2003-04-05 00:53:31 +000057 "run nfsargs addip addmisc;bootm\0" \
58 "rootpath=/opt/eldk/mips_4KC\0" \
59 "bootfile=/tftpboot/INCA/uImage\0" \
60 "kernel_addr=B0040000\0" \
61 "ramdisk_addr=B0100000\0" \
62 "u-boot=/tftpboot/INCA/u-boot.bin\0" \
Wolfgang Denk86eb3b72005-11-20 21:40:11 +010063 "load=tftp 80500000 ${u-boot}\0" \
wdenkb02744a2003-04-05 00:53:31 +000064 "update=protect off 1:0-2;era 1:0-2;" \
Wolfgang Denk86eb3b72005-11-20 21:40:11 +010065 "cp.b 80500000 B0000000 ${filesize}\0" \
wdenkb02744a2003-04-05 00:53:31 +000066 ""
67#define CONFIG_BOOTCOMMAND "run flash_self"
68
Jon Loeliger860435b2007-07-04 22:32:32 -050069
70/*
Jon Loeliger140b69c2007-07-10 09:38:02 -050071 * BOOTP options
72 */
73#define CONFIG_BOOTP_BOOTFILESIZE
74#define CONFIG_BOOTP_BOOTPATH
75#define CONFIG_BOOTP_GATEWAY
76#define CONFIG_BOOTP_HOSTNAME
77
78
79/*
Jon Loeliger860435b2007-07-04 22:32:32 -050080 * Command line configuration.
81 */
82#include <config_cmd_default.h>
83
84#define CONFIG_CMD_ASKENV
85#define CONFIG_CMD_DHCP
86#define CONFIG_CMD_ELF
87#define CONFIG_CMD_JFFS2
88#define CONFIG_CMD_NFS
89#define CONFIG_CMD_PING
90#define CONFIG_CMD_SNTP
91
wdenkbb1b8262003-03-27 12:09:35 +000092
93/*
94 * Miscellaneous configurable options
95 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020096#define CONFIG_SYS_LONGHELP /* undef to save memory */
97#define CONFIG_SYS_PROMPT "INCA-IP # " /* Monitor Command Prompt */
98#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
99#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
100#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/
wdenkbb1b8262003-03-27 12:09:35 +0000101
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200102#define CONFIG_SYS_MALLOC_LEN 128*1024
wdenkb02744a2003-04-05 00:53:31 +0000103
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200104#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024
wdenkb02744a2003-04-05 00:53:31 +0000105
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200106#define CONFIG_SYS_MIPS_TIMER_FREQ (incaip_get_cpuclk() / 2)
Shinya Kuribayashi5d374e02008-06-05 22:29:00 +0900107
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200108#define CONFIG_SYS_SDRAM_BASE 0x80000000
wdenkb02744a2003-04-05 00:53:31 +0000109
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200110#define CONFIG_SYS_LOAD_ADDR 0x80100000 /* default load address */
wdenkbb1b8262003-03-27 12:09:35 +0000111
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200112#define CONFIG_SYS_MEMTEST_START 0x80100000
113#define CONFIG_SYS_MEMTEST_END 0x80800000
wdenkbb1b8262003-03-27 12:09:35 +0000114
115/*-----------------------------------------------------------------------
116 * FLASH and environment organization
117 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200118#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
119#define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
wdenkbb1b8262003-03-27 12:09:35 +0000120
121#define PHYS_FLASH_1 0xb0000000 /* Flash Bank #1 */
122#define PHYS_FLASH_2 0xb0800000 /* Flash Bank #2 */
123
124/* The following #defines are needed to get flash environment right */
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200125#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200126#define CONFIG_SYS_MONITOR_LEN (192 << 10)
wdenkbb1b8262003-03-27 12:09:35 +0000127
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200128#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
wdenkbb1b8262003-03-27 12:09:35 +0000129
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200130#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
wdenkbb1b8262003-03-27 12:09:35 +0000131
132/* timeout values are in ticks */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200133#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
134#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
wdenkbb1b8262003-03-27 12:09:35 +0000135
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200136#define CONFIG_ENV_IS_IN_FLASH 1
wdenkbb1b8262003-03-27 12:09:35 +0000137
138/* Address and size of Primary Environment Sector */
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200139#define CONFIG_ENV_ADDR 0xB0030000
140#define CONFIG_ENV_SIZE 0x10000
wdenkbb1b8262003-03-27 12:09:35 +0000141
142#define CONFIG_FLASH_16BIT
143
144#define CONFIG_NR_DRAM_BANKS 1
145
146#define CONFIG_INCA_IP_SWITCH
wdenkdb82c8e2004-02-26 23:01:04 +0000147#define CONFIG_INCA_IP_SWITCH_AMDIX
wdenkbb1b8262003-03-27 12:09:35 +0000148
Wolfgang Denk47f57792005-08-08 01:03:24 +0200149/*
150 * JFFS2 partitions
151 */
152/* No command line, one static partition, use all space on the device */
Stefan Roeseb1423dd2009-03-19 13:30:36 +0100153#undef CONFIG_CMD_MTDPARTS
Wolfgang Denk47f57792005-08-08 01:03:24 +0200154#define CONFIG_JFFS2_DEV "nor1"
155#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
156#define CONFIG_JFFS2_PART_OFFSET 0x00000000
157
158/* mtdparts command line support */
159/*
Stefan Roeseb1423dd2009-03-19 13:30:36 +0100160#define CONFIG_CMD_MTDPARTS
Wolfgang Denk47f57792005-08-08 01:03:24 +0200161#define MTDIDS_DEFAULT "nor0=INCA-IP Bank 0"
162#define MTDPARTS_DEFAULT "mtdparts=INCA-IP Bank 0:192k(uboot)," \
163 "64k(env)," \
164 "768k(linux)," \
165 "1m@3m(rootfs)," \
166 "768k(linux2)," \
167 "3m@5m(rootfs2)"
168*/
wdenkdf28aa02003-12-12 00:02:26 +0000169
wdenkbb1b8262003-03-27 12:09:35 +0000170/*-----------------------------------------------------------------------
171 * Cache Configuration
172 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200173#define CONFIG_SYS_DCACHE_SIZE 4096
174#define CONFIG_SYS_ICACHE_SIZE 4096
175#define CONFIG_SYS_CACHELINE_SIZE 16
wdenkbb1b8262003-03-27 12:09:35 +0000176
177#endif /* __CONFIG_H */