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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Chen-Yu Tsai0d152762014-10-04 20:37:26 +08002/*
3 * (C) Copyright 2014
4 * Chen-Yu Tsai <wens@csie.org>
5 *
6 * Watchdog register definitions
Chen-Yu Tsai0d152762014-10-04 20:37:26 +08007 */
8
9#ifndef _SUNXI_WATCHDOG_H_
10#define _SUNXI_WATCHDOG_H_
11
12#define WDT_CTRL_RESTART (0x1 << 0)
13#define WDT_CTRL_KEY (0x0a57 << 1)
Chen-Yu Tsai1275c482014-10-04 20:37:28 +080014
Chen-Yu Tsai84f3bb42016-11-30 16:27:14 +080015#if defined(CONFIG_MACH_SUN4I) || \
16 defined(CONFIG_MACH_SUN5I) || \
17 defined(CONFIG_MACH_SUN7I) || \
18 defined(CONFIG_MACH_SUN8I_R40)
Chen-Yu Tsai1275c482014-10-04 20:37:28 +080019
Chen-Yu Tsai0d152762014-10-04 20:37:26 +080020#define WDT_MODE_EN (0x1 << 0)
21#define WDT_MODE_RESET_EN (0x1 << 1)
22
23struct sunxi_wdog {
24 u32 ctl; /* 0x00 */
25 u32 mode; /* 0x04 */
26 u32 res[2];
27};
28
Chen-Yu Tsai1275c482014-10-04 20:37:28 +080029#else
30
31#define WDT_CFG_RESET (0x1)
32#define WDT_MODE_EN (0x1)
33
34struct sunxi_wdog {
35 u32 irq_en; /* 0x00 */
36 u32 irq_sta; /* 0x04 */
37 u32 res1[2];
38 u32 ctl; /* 0x10 */
39 u32 cfg; /* 0x14 */
40 u32 mode; /* 0x18 */
41 u32 res2;
42};
43
44#endif
45
Chen-Yu Tsai0d152762014-10-04 20:37:26 +080046#endif /* _SUNXI_WATCHDOG_H_ */