Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Chen-Yu Tsai | fcc7b70 | 2015-08-25 10:49:19 +0800 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2015 Chen-Yu Tsai <wens@csie.org> |
Chen-Yu Tsai | fcc7b70 | 2015-08-25 10:49:19 +0800 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef _SUNXI_TZPC_H |
| 7 | #define _SUNXI_TZPC_H |
| 8 | |
| 9 | #ifndef __ASSEMBLY__ |
| 10 | struct sunxi_tzpc { |
| 11 | u32 r0size; /* 0x00 Size of secure RAM region */ |
| 12 | u32 decport0_status; /* 0x04 Status of decode protection port 0 */ |
| 13 | u32 decport0_set; /* 0x08 Set decode protection port 0 */ |
| 14 | u32 decport0_clear; /* 0x0c Clear decode protection port 0 */ |
Chen-Yu Tsai | 0932b63 | 2016-01-06 15:13:06 +0800 | [diff] [blame] | 15 | /* For A80 and later SoCs */ |
| 16 | u32 decport1_status; /* 0x10 Status of decode protection port 1 */ |
| 17 | u32 decport1_set; /* 0x14 Set decode protection port 1 */ |
| 18 | u32 decport1_clear; /* 0x18 Clear decode protection port 1 */ |
| 19 | u32 decport2_status; /* 0x1c Status of decode protection port 2 */ |
| 20 | u32 decport2_set; /* 0x20 Set decode protection port 2 */ |
| 21 | u32 decport2_clear; /* 0x24 Clear decode protection port 2 */ |
Chen-Yu Tsai | fcc7b70 | 2015-08-25 10:49:19 +0800 | [diff] [blame] | 22 | }; |
| 23 | #endif |
| 24 | |
Chen-Yu Tsai | 0932b63 | 2016-01-06 15:13:06 +0800 | [diff] [blame] | 25 | #define SUN6I_TZPC_DECPORT0_RTC (1 << 1) |
| 26 | |
| 27 | #define SUN8I_H3_TZPC_DECPORT0_ALL 0xbe |
| 28 | #define SUN8I_H3_TZPC_DECPORT1_ALL 0xff |
| 29 | #define SUN8I_H3_TZPC_DECPORT2_ALL 0x7f |
Chen-Yu Tsai | fcc7b70 | 2015-08-25 10:49:19 +0800 | [diff] [blame] | 30 | |
| 31 | void tzpc_init(void); |
| 32 | |
| 33 | #endif /* _SUNXI_TZPC_H */ |