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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * Simple serial driver for Cogent motherboard serial ports
3 * for use during boot
4 */
5
6#include <common.h>
7#include <board/cogent/serial.h>
Marek Vasutf7284022012-09-13 12:29:31 +02008#include <serial.h>
9#include <linux/compiler.h>
wdenkc6097192002-11-03 00:24:07 +000010
Wolfgang Denk6405a152006-03-31 18:32:53 +020011DECLARE_GLOBAL_DATA_PTR;
12
wdenkc6097192002-11-03 00:24:07 +000013#if (CMA_MB_CAPS & CMA_MB_CAP_SERPAR)
14
15#if (defined(CONFIG_8xx) && defined(CONFIG_8xx_CONS_NONE)) || \
16 (defined(CONFIG_8260) && defined(CONFIG_CONS_NONE))
17
18#if CONFIG_CONS_INDEX == 1
19#define CMA_MB_SERIAL_BASE CMA_MB_SERIALA_BASE
20#elif CONFIG_CONS_INDEX == 2
21#define CMA_MB_SERIAL_BASE CMA_MB_SERIALB_BASE
22#elif CONFIG_CONS_INDEX == 3 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
23#define CMA_MB_SERIAL_BASE CMA_MB_SER2A_BASE
24#elif CONFIG_CONS_INDEX == 4 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
25#define CMA_MB_SERIAL_BASE CMA_MB_SER2B_BASE
26#else
27#error CONFIG_CONS_INDEX must be configured for Cogent motherboard serial
28#endif
29
Marek Vasutf7284022012-09-13 12:29:31 +020030static int cogent_serial_init(void)
wdenkc6097192002-11-03 00:24:07 +000031{
Wolfgang Denk6405a152006-03-31 18:32:53 +020032 cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
wdenkc6097192002-11-03 00:24:07 +000033
Wolfgang Denk6405a152006-03-31 18:32:53 +020034 cma_mb_reg_write (&mbsp->ser_ier, 0x00); /* turn off interrupts */
35 serial_setbrg ();
36 cma_mb_reg_write (&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */
37 cma_mb_reg_write (&mbsp->ser_mcr, 0x03); /* RTS/DTR */
38 cma_mb_reg_write (&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */
wdenkc6097192002-11-03 00:24:07 +000039
Wolfgang Denk6405a152006-03-31 18:32:53 +020040 return (0);
wdenkc6097192002-11-03 00:24:07 +000041}
42
Marek Vasutf7284022012-09-13 12:29:31 +020043static void cogent_serial_setbrg(void)
wdenkc6097192002-11-03 00:24:07 +000044{
Wolfgang Denk6405a152006-03-31 18:32:53 +020045 cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
46 unsigned int divisor;
47 unsigned char lcr;
wdenkc6097192002-11-03 00:24:07 +000048
Wolfgang Denk6405a152006-03-31 18:32:53 +020049 if ((divisor = br_to_div (gd->baudrate)) == 0)
50 divisor = DEFDIV;
wdenkc6097192002-11-03 00:24:07 +000051
Wolfgang Denk6405a152006-03-31 18:32:53 +020052 lcr = cma_mb_reg_read (&mbsp->ser_lcr);
53 cma_mb_reg_write (&mbsp->ser_lcr, lcr | 0x80); /* Access baud rate(set DLAB) */
54 cma_mb_reg_write (&mbsp->ser_brl, divisor & 0xff);
55 cma_mb_reg_write (&mbsp->ser_brh, (divisor >> 8) & 0xff);
56 cma_mb_reg_write (&mbsp->ser_lcr, lcr); /* unset DLAB */
wdenkc6097192002-11-03 00:24:07 +000057}
58
Marek Vasutf7284022012-09-13 12:29:31 +020059static void cogent_serial_putc(const char c)
wdenkc6097192002-11-03 00:24:07 +000060{
Wolfgang Denk6405a152006-03-31 18:32:53 +020061 cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
wdenkc6097192002-11-03 00:24:07 +000062
Wolfgang Denk6405a152006-03-31 18:32:53 +020063 if (c == '\n')
64 serial_putc ('\r');
wdenkc6097192002-11-03 00:24:07 +000065
Wolfgang Denk6405a152006-03-31 18:32:53 +020066 while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_THRE) == 0);
wdenkc6097192002-11-03 00:24:07 +000067
Wolfgang Denk6405a152006-03-31 18:32:53 +020068 cma_mb_reg_write (&mbsp->ser_thr, c);
wdenkc6097192002-11-03 00:24:07 +000069}
70
Marek Vasutf7284022012-09-13 12:29:31 +020071static void cogent_serial_puts(const char *s)
wdenkc6097192002-11-03 00:24:07 +000072{
Wolfgang Denk6405a152006-03-31 18:32:53 +020073 while (*s != '\0')
74 serial_putc (*s++);
wdenkc6097192002-11-03 00:24:07 +000075}
76
Marek Vasutf7284022012-09-13 12:29:31 +020077static int cogent_serial_getc(void)
wdenkc6097192002-11-03 00:24:07 +000078{
Wolfgang Denk6405a152006-03-31 18:32:53 +020079 cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
wdenkc6097192002-11-03 00:24:07 +000080
Wolfgang Denk6405a152006-03-31 18:32:53 +020081 while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) == 0);
wdenkc6097192002-11-03 00:24:07 +000082
Wolfgang Denk6405a152006-03-31 18:32:53 +020083 return ((int) cma_mb_reg_read (&mbsp->ser_rhr) & 0x7f);
wdenkc6097192002-11-03 00:24:07 +000084}
85
Marek Vasutf7284022012-09-13 12:29:31 +020086static int cogent_serial_tstc(void)
wdenkc6097192002-11-03 00:24:07 +000087{
Wolfgang Denk6405a152006-03-31 18:32:53 +020088 cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
wdenkc6097192002-11-03 00:24:07 +000089
Wolfgang Denk6405a152006-03-31 18:32:53 +020090 return ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) != 0);
wdenkc6097192002-11-03 00:24:07 +000091}
92
Marek Vasutf7284022012-09-13 12:29:31 +020093static struct serial_device cogent_serial_drv = {
94 .name = "cogent_serial",
95 .start = cogent_serial_init,
96 .stop = NULL,
97 .setbrg = cogent_serial_setbrg,
98 .putc = cogent_serial_putc,
99 .puts = cogent_serial_puts,
100 .getc = cogent_serial_getc,
101 .tstc = cogent_serial_tstc,
102};
103
104void cogent_serial_initialize(void)
105{
106 serial_register(&cogent_serial_drv);
107}
108
109__weak struct serial_device *default_serial_console(void)
110{
111 return &cogent_serial_drv;
112}
wdenkc6097192002-11-03 00:24:07 +0000113#endif /* CONS_NONE */
114
Jon Loeligerd299abc2007-07-09 18:19:09 -0500115#if defined(CONFIG_CMD_KGDB) && \
wdenkc6097192002-11-03 00:24:07 +0000116 defined(CONFIG_KGDB_NONE)
117
118#if CONFIG_KGDB_INDEX == CONFIG_CONS_INDEX
119#error Console and kgdb are on the same serial port - this is not supported
120#endif
121
122#if CONFIG_KGDB_INDEX == 1
123#define CMA_MB_KGDB_SER_BASE CMA_MB_SERIALA_BASE
124#elif CONFIG_KGDB_INDEX == 2
125#define CMA_MB_KGDB_SER_BASE CMA_MB_SERIALB_BASE
126#elif CONFIG_KGDB_INDEX == 3 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
127#define CMA_MB_KGDB_SER_BASE CMA_MB_SER2A_BASE
128#elif CONFIG_KGDB_INDEX == 4 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
129#define CMA_MB_KGDB_SER_BASE CMA_MB_SER2B_BASE
130#else
131#error CONFIG_KGDB_INDEX must be configured for Cogent motherboard serial
132#endif
133
Wolfgang Denk6405a152006-03-31 18:32:53 +0200134void kgdb_serial_init (void)
wdenkc6097192002-11-03 00:24:07 +0000135{
Wolfgang Denk6405a152006-03-31 18:32:53 +0200136 cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
137 unsigned int divisor;
wdenkc6097192002-11-03 00:24:07 +0000138
Wolfgang Denk6405a152006-03-31 18:32:53 +0200139 if ((divisor = br_to_div (CONFIG_KGDB_BAUDRATE)) == 0)
140 divisor = DEFDIV;
wdenkc6097192002-11-03 00:24:07 +0000141
Wolfgang Denk6405a152006-03-31 18:32:53 +0200142 cma_mb_reg_write (&mbsp->ser_ier, 0x00); /* turn off interrupts */
143 cma_mb_reg_write (&mbsp->ser_lcr, 0x80); /* Access baud rate(set DLAB) */
144 cma_mb_reg_write (&mbsp->ser_brl, divisor & 0xff);
145 cma_mb_reg_write (&mbsp->ser_brh, (divisor >> 8) & 0xff);
146 cma_mb_reg_write (&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */
147 cma_mb_reg_write (&mbsp->ser_mcr, 0x03); /* RTS/DTR */
148 cma_mb_reg_write (&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */
wdenkc6097192002-11-03 00:24:07 +0000149
Wolfgang Denk6405a152006-03-31 18:32:53 +0200150 printf ("[on cma10x serial port B] ");
wdenkc6097192002-11-03 00:24:07 +0000151}
152
Wolfgang Denk6405a152006-03-31 18:32:53 +0200153void putDebugChar (int c)
wdenkc6097192002-11-03 00:24:07 +0000154{
Wolfgang Denk6405a152006-03-31 18:32:53 +0200155 cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
wdenkc6097192002-11-03 00:24:07 +0000156
Wolfgang Denk6405a152006-03-31 18:32:53 +0200157 while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_THRE) == 0);
wdenkc6097192002-11-03 00:24:07 +0000158
Wolfgang Denk6405a152006-03-31 18:32:53 +0200159 cma_mb_reg_write (&mbsp->ser_thr, c & 0xff);
wdenkc6097192002-11-03 00:24:07 +0000160}
161
Wolfgang Denk6405a152006-03-31 18:32:53 +0200162void putDebugStr (const char *str)
wdenkc6097192002-11-03 00:24:07 +0000163{
Wolfgang Denk6405a152006-03-31 18:32:53 +0200164 while (*str != '\0') {
165 if (*str == '\n')
166 putDebugChar ('\r');
167 putDebugChar (*str++);
168 }
wdenkc6097192002-11-03 00:24:07 +0000169}
170
Wolfgang Denk6405a152006-03-31 18:32:53 +0200171int getDebugChar (void)
wdenkc6097192002-11-03 00:24:07 +0000172{
Wolfgang Denk6405a152006-03-31 18:32:53 +0200173 cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
wdenkc6097192002-11-03 00:24:07 +0000174
Wolfgang Denk6405a152006-03-31 18:32:53 +0200175 while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) == 0);
wdenkc6097192002-11-03 00:24:07 +0000176
Wolfgang Denk6405a152006-03-31 18:32:53 +0200177 return ((int) cma_mb_reg_read (&mbsp->ser_rhr) & 0x7f);
wdenkc6097192002-11-03 00:24:07 +0000178}
179
Wolfgang Denk6405a152006-03-31 18:32:53 +0200180void kgdb_interruptible (int yes)
wdenkc6097192002-11-03 00:24:07 +0000181{
Wolfgang Denk6405a152006-03-31 18:32:53 +0200182 cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
wdenkc6097192002-11-03 00:24:07 +0000183
Wolfgang Denk6405a152006-03-31 18:32:53 +0200184 if (yes == 1) {
185 printf ("kgdb: turning serial ints on\n");
186 cma_mb_reg_write (&mbsp->ser_ier, 0xf);
187 } else {
188 printf ("kgdb: turning serial ints off\n");
189 cma_mb_reg_write (&mbsp->ser_ier, 0x0);
190 }
wdenkc6097192002-11-03 00:24:07 +0000191}
192
193#endif /* KGDB && KGDB_NONE */
194
195#endif /* CAPS & SERPAR */