blob: 0dcf937d9a67bc28a562e6496d3c5cbb68935416 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glassd9e90bb2015-03-05 12:25:28 -07002/*
3 * Copyright (c) 2014 Google, Inc
4 * Written by Simon Glass <sjg@chromium.org>
Simon Glassd9e90bb2015-03-05 12:25:28 -07005 */
6
7#include <common.h>
8#include <dm.h>
9#include <fdtdec.h>
Masahiro Yamada75f82d02018-03-05 01:20:11 +090010#include <linux/libfdt.h>
Simon Glassd9e90bb2015-03-05 12:25:28 -070011#include <pci.h>
12#include <dm/lists.h>
13
Bin Meng11c41ab2018-08-03 01:14:49 -070014struct sandbox_pci_emul_priv {
Simon Glassd9e90bb2015-03-05 12:25:28 -070015 int dev_count;
16};
17
18int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn,
Bin Meng156bc6f2018-08-03 01:14:45 -070019 struct udevice **containerp, struct udevice **emulp)
Simon Glassd9e90bb2015-03-05 12:25:28 -070020{
21 struct udevice *dev;
22 int ret;
23
Bin Meng156bc6f2018-08-03 01:14:45 -070024 *containerp = NULL;
Bin Meng2fc987e2018-08-03 01:14:43 -070025 ret = pci_bus_find_devfn(bus, PCI_MASK_BUS(find_devfn), &dev);
Simon Glassd9e90bb2015-03-05 12:25:28 -070026 if (ret) {
27 debug("%s: Could not find emulator for dev %x\n", __func__,
28 find_devfn);
29 return ret;
30 }
Bin Meng156bc6f2018-08-03 01:14:45 -070031 *containerp = dev;
Simon Glassd9e90bb2015-03-05 12:25:28 -070032
Simon Glassb98ba4c2019-09-25 08:56:10 -060033 /*
34 * See commit 4345998ae9df,
35 * "pci: sandbox: Support dynamically binding device driver"
36 */
Simon Glass1bc0f4f2019-08-31 17:59:32 -060037 ret = uclass_get_device_by_phandle(UCLASS_PCI_EMUL, dev, "sandbox,emul",
38 emulp);
Simon Glassb98ba4c2019-09-25 08:56:10 -060039 if (ret && device_get_uclass_id(dev) != UCLASS_PCI_GENERIC)
Bin Meng156bc6f2018-08-03 01:14:45 -070040 *emulp = dev;
Simon Glassd9e90bb2015-03-05 12:25:28 -070041
42 return *emulp ? 0 : -ENODEV;
43}
44
Simon Glass72231f72019-09-25 08:56:42 -060045uint sandbox_pci_read_bar(u32 barval, int type, uint size)
46{
47 u32 result;
48
49 result = barval;
50 if (result == 0xffffffff) {
51 if (type == PCI_BASE_ADDRESS_SPACE_IO) {
52 result = (~(size - 1) &
53 PCI_BASE_ADDRESS_IO_MASK) |
54 PCI_BASE_ADDRESS_SPACE_IO;
55 } else {
56 result = (~(size - 1) &
57 PCI_BASE_ADDRESS_MEM_MASK) |
58 PCI_BASE_ADDRESS_MEM_TYPE_32;
59 }
60 }
61
62 return result;
63}
64
Simon Glassd9e90bb2015-03-05 12:25:28 -070065static int sandbox_pci_emul_post_probe(struct udevice *dev)
66{
Bin Meng11c41ab2018-08-03 01:14:49 -070067 struct sandbox_pci_emul_priv *priv = dev->uclass->priv;
Simon Glassd9e90bb2015-03-05 12:25:28 -070068
69 priv->dev_count++;
70 sandbox_set_enable_pci_map(true);
71
72 return 0;
73}
74
75static int sandbox_pci_emul_pre_remove(struct udevice *dev)
76{
Bin Meng11c41ab2018-08-03 01:14:49 -070077 struct sandbox_pci_emul_priv *priv = dev->uclass->priv;
Simon Glassd9e90bb2015-03-05 12:25:28 -070078
79 priv->dev_count--;
80 sandbox_set_enable_pci_map(priv->dev_count > 0);
81
82 return 0;
83}
84
85UCLASS_DRIVER(pci_emul) = {
86 .id = UCLASS_PCI_EMUL,
87 .name = "pci_emul",
88 .post_probe = sandbox_pci_emul_post_probe,
89 .pre_remove = sandbox_pci_emul_pre_remove,
Bin Meng11c41ab2018-08-03 01:14:49 -070090 .priv_auto_alloc_size = sizeof(struct sandbox_pci_emul_priv),
Simon Glassd9e90bb2015-03-05 12:25:28 -070091};
Simon Glassb98ba4c2019-09-25 08:56:10 -060092
93/*
94 * This uclass is a child of the pci bus. Its platdata is not defined here so
95 * is defined by its parent, UCLASS_PCI, which uses struct pci_child_platdata.
96 * See per_child_platdata_auto_alloc_size in UCLASS_DRIVER(pci).
97 */
98UCLASS_DRIVER(pci_emul_parent) = {
99 .id = UCLASS_PCI_EMUL_PARENT,
100 .name = "pci_emul_parent",
101 .post_bind = dm_scan_fdt_dev,
102};
103
104static const struct udevice_id pci_emul_parent_ids[] = {
105 { .compatible = "sandbox,pci-emul-parent" },
106 { }
107};
108
109U_BOOT_DRIVER(pci_emul_parent_drv) = {
110 .name = "pci_emul_parent_drv",
111 .id = UCLASS_PCI_EMUL_PARENT,
112 .of_match = pci_emul_parent_ids,
113};