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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Christophe Leroy069fa832017-07-06 10:23:22 +02002/*
3 * (C) Copyright 2000
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
Christophe Leroy069fa832017-07-06 10:23:22 +02005 */
6
7#include <common.h>
Christophe Leroy069fa832017-07-06 10:23:22 +02008#include <command.h>
9#include <serial.h>
10#include <watchdog.h>
Christophe Leroy10ff63a2018-03-16 17:20:43 +010011#include <asm/cpm_8xx.h>
Christophe Leroy069fa832017-07-06 10:23:22 +020012#include <linux/compiler.h>
13
14DECLARE_GLOBAL_DATA_PTR;
15
Christophe Leroy069fa832017-07-06 10:23:22 +020016#if defined(CONFIG_8xx_CONS_SMC1) /* Console on SMC1 */
17#define SMC_INDEX 0
18#define PROFF_SMC PROFF_SMC1
19#define CPM_CR_CH_SMC CPM_CR_CH_SMC1
Christophe Leroy394f9b32017-07-06 10:33:13 +020020#define IOPINS 0xc0
Christophe Leroy069fa832017-07-06 10:23:22 +020021
22#elif defined(CONFIG_8xx_CONS_SMC2) /* Console on SMC2 */
23#define SMC_INDEX 1
24#define PROFF_SMC PROFF_SMC2
25#define CPM_CR_CH_SMC CPM_CR_CH_SMC2
Christophe Leroy394f9b32017-07-06 10:33:13 +020026#define IOPINS 0xc00
Christophe Leroy069fa832017-07-06 10:23:22 +020027
28#endif /* CONFIG_8xx_CONS_SMCx */
29
Christophe Leroy394f9b32017-07-06 10:33:13 +020030struct serialbuffer {
Christophe Leroy069fa832017-07-06 10:23:22 +020031 cbd_t rxbd; /* Rx BD */
32 cbd_t txbd; /* Tx BD */
33 uint rxindex; /* index for next character to read */
Christophe Leroy394f9b32017-07-06 10:33:13 +020034 uchar rxbuf[CONFIG_SYS_SMC_RXBUFLEN];/* rx buffers */
35 uchar txbuf; /* tx buffers */
36};
Christophe Leroy069fa832017-07-06 10:23:22 +020037
Christophe Leroy394f9b32017-07-06 10:33:13 +020038static void serial_setdivisor(cpm8xx_t __iomem *cp)
Christophe Leroy069fa832017-07-06 10:23:22 +020039{
Christophe Leroy48f896d2017-07-06 10:33:17 +020040 int divisor = (gd->cpu_clk + 8 * gd->baudrate) / 16 / gd->baudrate;
Christophe Leroy069fa832017-07-06 10:23:22 +020041
Christophe Leroy48f896d2017-07-06 10:33:17 +020042 if (divisor / 16 > 0x1000) {
Christophe Leroy069fa832017-07-06 10:23:22 +020043 /* bad divisor, assume 50MHz clock and 9600 baud */
Christophe Leroy48f896d2017-07-06 10:33:17 +020044 divisor = (50 * 1000 * 1000 + 8 * 9600) / 16 / 9600;
Christophe Leroy069fa832017-07-06 10:23:22 +020045 }
46
Christophe Leroy069fa832017-07-06 10:23:22 +020047 divisor /= CONFIG_SYS_BRGCLK_PRESCALE;
Christophe Leroy069fa832017-07-06 10:23:22 +020048
Christophe Leroy394f9b32017-07-06 10:33:13 +020049 if (divisor <= 0x1000)
50 out_be32(&cp->cp_brgc1, ((divisor - 1) << 1) | CPM_BRG_EN);
51 else
52 out_be32(&cp->cp_brgc1, ((divisor / 16 - 1) << 1) | CPM_BRG_EN |
53 CPM_BRG_DIV16);
Christophe Leroy069fa832017-07-06 10:23:22 +020054}
55
56/*
57 * Minimal serial functions needed to use one of the SMC ports
58 * as serial console interface.
59 */
60
Christophe Leroy48f896d2017-07-06 10:33:17 +020061static void smc_setbrg(void)
Christophe Leroy069fa832017-07-06 10:23:22 +020062{
Christophe Leroy394f9b32017-07-06 10:33:13 +020063 immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR;
64 cpm8xx_t __iomem *cp = &(im->im_cpm);
Christophe Leroy069fa832017-07-06 10:23:22 +020065
66 /* Set up the baud rate generator.
67 * See 8xx_io/commproc.c for details.
68 *
69 * Wire BRG1 to SMCx
70 */
71
Christophe Leroy394f9b32017-07-06 10:33:13 +020072 out_be32(&cp->cp_simode, 0);
Christophe Leroy069fa832017-07-06 10:23:22 +020073
74 serial_setdivisor(cp);
75}
76
Christophe Leroy48f896d2017-07-06 10:33:17 +020077static int smc_init(void)
Christophe Leroy069fa832017-07-06 10:23:22 +020078{
Christophe Leroy394f9b32017-07-06 10:33:13 +020079 immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR;
80 smc_t __iomem *sp;
81 smc_uart_t __iomem *up;
82 cpm8xx_t __iomem *cp = &(im->im_cpm);
83 struct serialbuffer __iomem *rtx;
Christophe Leroy069fa832017-07-06 10:23:22 +020084
85 /* initialize pointers to SMC */
86
Christophe Leroy394f9b32017-07-06 10:33:13 +020087 sp = cp->cp_smc + SMC_INDEX;
88 up = (smc_uart_t __iomem *)&cp->cp_dparam[PROFF_SMC];
Christophe Leroy069fa832017-07-06 10:23:22 +020089 /* Disable relocation */
Christophe Leroy394f9b32017-07-06 10:33:13 +020090 out_be16(&up->smc_rpbase, 0);
Christophe Leroy069fa832017-07-06 10:23:22 +020091
92 /* Disable transmitter/receiver. */
Christophe Leroy394f9b32017-07-06 10:33:13 +020093 clrbits_be16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
Christophe Leroy069fa832017-07-06 10:23:22 +020094
95 /* Enable SDMA. */
Christophe Leroy394f9b32017-07-06 10:33:13 +020096 out_be32(&im->im_siu_conf.sc_sdcr, 1);
Christophe Leroy069fa832017-07-06 10:23:22 +020097
98 /* clear error conditions */
Christophe Leroy394f9b32017-07-06 10:33:13 +020099 out_8(&im->im_sdma.sdma_sdsr, CONFIG_SYS_SDSR);
Christophe Leroy069fa832017-07-06 10:23:22 +0200100
101 /* clear SDMA interrupt mask */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200102 out_8(&im->im_sdma.sdma_sdmr, CONFIG_SYS_SDMR);
Christophe Leroy069fa832017-07-06 10:23:22 +0200103
Christophe Leroy394f9b32017-07-06 10:33:13 +0200104 /* Use Port B for SMCx instead of other functions. */
105 setbits_be32(&cp->cp_pbpar, IOPINS);
106 clrbits_be32(&cp->cp_pbdir, IOPINS);
107 clrbits_be16(&cp->cp_pbodr, IOPINS);
Christophe Leroy069fa832017-07-06 10:23:22 +0200108
109 /* Set the physical address of the host memory buffers in
110 * the buffer descriptors.
111 */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200112 rtx = (struct serialbuffer __iomem *)&cp->cp_dpmem[CPM_SERIAL_BASE];
Christophe Leroy069fa832017-07-06 10:23:22 +0200113 /* Allocate space for two buffer descriptors in the DP ram.
114 * For now, this address seems OK, but it may have to
115 * change with newer versions of the firmware.
116 * damm: allocating space after the two buffers for rx/tx data
117 */
118
Christophe Leroy394f9b32017-07-06 10:33:13 +0200119 out_be32(&rtx->rxbd.cbd_bufaddr, (__force uint)&rtx->rxbuf);
120 out_be16(&rtx->rxbd.cbd_sc, 0);
Christophe Leroy069fa832017-07-06 10:23:22 +0200121
Christophe Leroy394f9b32017-07-06 10:33:13 +0200122 out_be32(&rtx->txbd.cbd_bufaddr, (__force uint)&rtx->txbuf);
123 out_be16(&rtx->txbd.cbd_sc, 0);
Christophe Leroy069fa832017-07-06 10:23:22 +0200124
125 /* Set up the uart parameters in the parameter ram. */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200126 out_be16(&up->smc_rbase, CPM_SERIAL_BASE);
127 out_be16(&up->smc_tbase, CPM_SERIAL_BASE + sizeof(cbd_t));
128 out_8(&up->smc_rfcr, SMC_EB);
129 out_8(&up->smc_tfcr, SMC_EB);
Christophe Leroy069fa832017-07-06 10:23:22 +0200130
131 /* Set UART mode, 8 bit, no parity, one stop.
132 * Enable receive and transmit.
133 */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200134 out_be16(&sp->smc_smcmr, smcr_mk_clen(9) | SMCMR_SM_UART);
Christophe Leroy069fa832017-07-06 10:23:22 +0200135
136 /* Mask all interrupts and remove anything pending.
137 */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200138 out_8(&sp->smc_smcm, 0);
139 out_8(&sp->smc_smce, 0xff);
Christophe Leroy069fa832017-07-06 10:23:22 +0200140
141 /* Set up the baud rate generator */
Christophe Leroy48f896d2017-07-06 10:33:17 +0200142 smc_setbrg();
Christophe Leroy069fa832017-07-06 10:23:22 +0200143
144 /* Make the first buffer the only buffer. */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200145 setbits_be16(&rtx->txbd.cbd_sc, BD_SC_WRAP);
146 setbits_be16(&rtx->rxbd.cbd_sc, BD_SC_EMPTY | BD_SC_WRAP);
Christophe Leroy069fa832017-07-06 10:23:22 +0200147
148 /* single/multi character receive. */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200149 out_be16(&up->smc_mrblr, CONFIG_SYS_SMC_RXBUFLEN);
150 out_be16(&up->smc_maxidl, CONFIG_SYS_MAXIDLE);
151 out_be32(&rtx->rxindex, 0);
Christophe Leroy069fa832017-07-06 10:23:22 +0200152
153 /* Initialize Tx/Rx parameters. */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200154 while (in_be16(&cp->cp_cpcr) & CPM_CR_FLG) /* wait if cp is busy */
155 ;
Christophe Leroy069fa832017-07-06 10:23:22 +0200156
Christophe Leroy394f9b32017-07-06 10:33:13 +0200157 out_be16(&cp->cp_cpcr,
158 mk_cr_cmd(CPM_CR_CH_SMC, CPM_CR_INIT_TRX) | CPM_CR_FLG);
Christophe Leroy069fa832017-07-06 10:23:22 +0200159
Christophe Leroy394f9b32017-07-06 10:33:13 +0200160 while (in_be16(&cp->cp_cpcr) & CPM_CR_FLG) /* wait if cp is busy */
161 ;
Christophe Leroy069fa832017-07-06 10:23:22 +0200162
163 /* Enable transmitter/receiver. */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200164 setbits_be16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
Christophe Leroy069fa832017-07-06 10:23:22 +0200165
Christophe Leroy48f896d2017-07-06 10:33:17 +0200166 return 0;
Christophe Leroy069fa832017-07-06 10:23:22 +0200167}
168
Christophe Leroy48f896d2017-07-06 10:33:17 +0200169static void smc_putc(const char c)
Christophe Leroy069fa832017-07-06 10:23:22 +0200170{
Christophe Leroy394f9b32017-07-06 10:33:13 +0200171 immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR;
172 cpm8xx_t __iomem *cpmp = &(im->im_cpm);
173 struct serialbuffer __iomem *rtx;
Christophe Leroy069fa832017-07-06 10:23:22 +0200174
175 if (c == '\n')
Christophe Leroy48f896d2017-07-06 10:33:17 +0200176 smc_putc('\r');
Christophe Leroy069fa832017-07-06 10:23:22 +0200177
Christophe Leroy394f9b32017-07-06 10:33:13 +0200178 rtx = (struct serialbuffer __iomem *)&cpmp->cp_dpmem[CPM_SERIAL_BASE];
Christophe Leroy069fa832017-07-06 10:23:22 +0200179
180 /* Wait for last character to go. */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200181 out_8(&rtx->txbuf, c);
182 out_be16(&rtx->txbd.cbd_datlen, 1);
183 setbits_be16(&rtx->txbd.cbd_sc, BD_SC_READY);
Christophe Leroy069fa832017-07-06 10:23:22 +0200184
Christophe Leroy394f9b32017-07-06 10:33:13 +0200185 while (in_be16(&rtx->txbd.cbd_sc) & BD_SC_READY)
Christophe Leroy48f896d2017-07-06 10:33:17 +0200186 WATCHDOG_RESET();
Christophe Leroy069fa832017-07-06 10:23:22 +0200187}
188
Christophe Leroy48f896d2017-07-06 10:33:17 +0200189static void smc_puts(const char *s)
Christophe Leroy069fa832017-07-06 10:23:22 +0200190{
Christophe Leroy48f896d2017-07-06 10:33:17 +0200191 while (*s)
192 smc_putc(*s++);
Christophe Leroy069fa832017-07-06 10:23:22 +0200193}
194
Christophe Leroy48f896d2017-07-06 10:33:17 +0200195static int smc_getc(void)
Christophe Leroy069fa832017-07-06 10:23:22 +0200196{
Christophe Leroy394f9b32017-07-06 10:33:13 +0200197 immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR;
198 cpm8xx_t __iomem *cpmp = &(im->im_cpm);
199 struct serialbuffer __iomem *rtx;
Christophe Leroy069fa832017-07-06 10:23:22 +0200200 unsigned char c;
Christophe Leroy394f9b32017-07-06 10:33:13 +0200201 uint rxindex;
Christophe Leroy069fa832017-07-06 10:23:22 +0200202
Christophe Leroy394f9b32017-07-06 10:33:13 +0200203 rtx = (struct serialbuffer __iomem *)&cpmp->cp_dpmem[CPM_SERIAL_BASE];
Christophe Leroy069fa832017-07-06 10:23:22 +0200204
205 /* Wait for character to show up. */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200206 while (in_be16(&rtx->rxbd.cbd_sc) & BD_SC_EMPTY)
Christophe Leroy48f896d2017-07-06 10:33:17 +0200207 WATCHDOG_RESET();
Christophe Leroy069fa832017-07-06 10:23:22 +0200208
209 /* the characters are read one by one,
210 * use the rxindex to know the next char to deliver
211 */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200212 rxindex = in_be32(&rtx->rxindex);
213 c = in_8(rtx->rxbuf + rxindex);
214 rxindex++;
Christophe Leroy069fa832017-07-06 10:23:22 +0200215
216 /* check if all char are readout, then make prepare for next receive */
Christophe Leroy394f9b32017-07-06 10:33:13 +0200217 if (rxindex >= in_be16(&rtx->rxbd.cbd_datlen)) {
218 rxindex = 0;
219 setbits_be16(&rtx->rxbd.cbd_sc, BD_SC_EMPTY);
Christophe Leroy069fa832017-07-06 10:23:22 +0200220 }
Christophe Leroy394f9b32017-07-06 10:33:13 +0200221 out_be32(&rtx->rxindex, rxindex);
Christophe Leroy48f896d2017-07-06 10:33:17 +0200222 return c;
Christophe Leroy069fa832017-07-06 10:23:22 +0200223}
224
Christophe Leroy48f896d2017-07-06 10:33:17 +0200225static int smc_tstc(void)
Christophe Leroy069fa832017-07-06 10:23:22 +0200226{
Christophe Leroy394f9b32017-07-06 10:33:13 +0200227 immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR;
228 cpm8xx_t __iomem *cpmp = &(im->im_cpm);
229 struct serialbuffer __iomem *rtx;
Christophe Leroy069fa832017-07-06 10:23:22 +0200230
Christophe Leroy394f9b32017-07-06 10:33:13 +0200231 rtx = (struct serialbuffer __iomem *)&cpmp->cp_dpmem[CPM_SERIAL_BASE];
Christophe Leroy069fa832017-07-06 10:23:22 +0200232
Christophe Leroy394f9b32017-07-06 10:33:13 +0200233 return !(in_be16(&rtx->rxbd.cbd_sc) & BD_SC_EMPTY);
Christophe Leroy069fa832017-07-06 10:23:22 +0200234}
235
Christophe Leroy48f896d2017-07-06 10:33:17 +0200236struct serial_device serial_smc_device = {
Christophe Leroy069fa832017-07-06 10:23:22 +0200237 .name = "serial_smc",
238 .start = smc_init,
239 .stop = NULL,
240 .setbrg = smc_setbrg,
241 .getc = smc_getc,
242 .tstc = smc_tstc,
243 .putc = smc_putc,
244 .puts = smc_puts,
245};
246
247__weak struct serial_device *default_serial_console(void)
248{
249 return &serial_smc_device;
250}
251
252void mpc8xx_serial_initialize(void)
253{
254 serial_register(&serial_smc_device);
255}