Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2000 |
| 4 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <common.h> |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 8 | #include <command.h> |
| 9 | #include <serial.h> |
| 10 | #include <watchdog.h> |
Christophe Leroy | 10ff63a | 2018-03-16 17:20:43 +0100 | [diff] [blame] | 11 | #include <asm/cpm_8xx.h> |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 12 | #include <linux/compiler.h> |
| 13 | |
| 14 | DECLARE_GLOBAL_DATA_PTR; |
| 15 | |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 16 | #if defined(CONFIG_8xx_CONS_SMC1) /* Console on SMC1 */ |
| 17 | #define SMC_INDEX 0 |
| 18 | #define PROFF_SMC PROFF_SMC1 |
| 19 | #define CPM_CR_CH_SMC CPM_CR_CH_SMC1 |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 20 | #define IOPINS 0xc0 |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 21 | |
| 22 | #elif defined(CONFIG_8xx_CONS_SMC2) /* Console on SMC2 */ |
| 23 | #define SMC_INDEX 1 |
| 24 | #define PROFF_SMC PROFF_SMC2 |
| 25 | #define CPM_CR_CH_SMC CPM_CR_CH_SMC2 |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 26 | #define IOPINS 0xc00 |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 27 | |
| 28 | #endif /* CONFIG_8xx_CONS_SMCx */ |
| 29 | |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 30 | struct serialbuffer { |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 31 | cbd_t rxbd; /* Rx BD */ |
| 32 | cbd_t txbd; /* Tx BD */ |
| 33 | uint rxindex; /* index for next character to read */ |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 34 | uchar rxbuf[CONFIG_SYS_SMC_RXBUFLEN];/* rx buffers */ |
| 35 | uchar txbuf; /* tx buffers */ |
| 36 | }; |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 37 | |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 38 | static void serial_setdivisor(cpm8xx_t __iomem *cp) |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 39 | { |
Christophe Leroy | 48f896d | 2017-07-06 10:33:17 +0200 | [diff] [blame] | 40 | int divisor = (gd->cpu_clk + 8 * gd->baudrate) / 16 / gd->baudrate; |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 41 | |
Christophe Leroy | 48f896d | 2017-07-06 10:33:17 +0200 | [diff] [blame] | 42 | if (divisor / 16 > 0x1000) { |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 43 | /* bad divisor, assume 50MHz clock and 9600 baud */ |
Christophe Leroy | 48f896d | 2017-07-06 10:33:17 +0200 | [diff] [blame] | 44 | divisor = (50 * 1000 * 1000 + 8 * 9600) / 16 / 9600; |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 45 | } |
| 46 | |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 47 | divisor /= CONFIG_SYS_BRGCLK_PRESCALE; |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 48 | |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 49 | if (divisor <= 0x1000) |
| 50 | out_be32(&cp->cp_brgc1, ((divisor - 1) << 1) | CPM_BRG_EN); |
| 51 | else |
| 52 | out_be32(&cp->cp_brgc1, ((divisor / 16 - 1) << 1) | CPM_BRG_EN | |
| 53 | CPM_BRG_DIV16); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 54 | } |
| 55 | |
| 56 | /* |
| 57 | * Minimal serial functions needed to use one of the SMC ports |
| 58 | * as serial console interface. |
| 59 | */ |
| 60 | |
Christophe Leroy | 48f896d | 2017-07-06 10:33:17 +0200 | [diff] [blame] | 61 | static void smc_setbrg(void) |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 62 | { |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 63 | immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR; |
| 64 | cpm8xx_t __iomem *cp = &(im->im_cpm); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 65 | |
| 66 | /* Set up the baud rate generator. |
| 67 | * See 8xx_io/commproc.c for details. |
| 68 | * |
| 69 | * Wire BRG1 to SMCx |
| 70 | */ |
| 71 | |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 72 | out_be32(&cp->cp_simode, 0); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 73 | |
| 74 | serial_setdivisor(cp); |
| 75 | } |
| 76 | |
Christophe Leroy | 48f896d | 2017-07-06 10:33:17 +0200 | [diff] [blame] | 77 | static int smc_init(void) |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 78 | { |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 79 | immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR; |
| 80 | smc_t __iomem *sp; |
| 81 | smc_uart_t __iomem *up; |
| 82 | cpm8xx_t __iomem *cp = &(im->im_cpm); |
| 83 | struct serialbuffer __iomem *rtx; |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 84 | |
| 85 | /* initialize pointers to SMC */ |
| 86 | |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 87 | sp = cp->cp_smc + SMC_INDEX; |
| 88 | up = (smc_uart_t __iomem *)&cp->cp_dparam[PROFF_SMC]; |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 89 | /* Disable relocation */ |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 90 | out_be16(&up->smc_rpbase, 0); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 91 | |
| 92 | /* Disable transmitter/receiver. */ |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 93 | clrbits_be16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 94 | |
| 95 | /* Enable SDMA. */ |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 96 | out_be32(&im->im_siu_conf.sc_sdcr, 1); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 97 | |
| 98 | /* clear error conditions */ |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 99 | out_8(&im->im_sdma.sdma_sdsr, CONFIG_SYS_SDSR); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 100 | |
| 101 | /* clear SDMA interrupt mask */ |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 102 | out_8(&im->im_sdma.sdma_sdmr, CONFIG_SYS_SDMR); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 103 | |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 104 | /* Use Port B for SMCx instead of other functions. */ |
| 105 | setbits_be32(&cp->cp_pbpar, IOPINS); |
| 106 | clrbits_be32(&cp->cp_pbdir, IOPINS); |
| 107 | clrbits_be16(&cp->cp_pbodr, IOPINS); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 108 | |
| 109 | /* Set the physical address of the host memory buffers in |
| 110 | * the buffer descriptors. |
| 111 | */ |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 112 | rtx = (struct serialbuffer __iomem *)&cp->cp_dpmem[CPM_SERIAL_BASE]; |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 113 | /* Allocate space for two buffer descriptors in the DP ram. |
| 114 | * For now, this address seems OK, but it may have to |
| 115 | * change with newer versions of the firmware. |
| 116 | * damm: allocating space after the two buffers for rx/tx data |
| 117 | */ |
| 118 | |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 119 | out_be32(&rtx->rxbd.cbd_bufaddr, (__force uint)&rtx->rxbuf); |
| 120 | out_be16(&rtx->rxbd.cbd_sc, 0); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 121 | |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 122 | out_be32(&rtx->txbd.cbd_bufaddr, (__force uint)&rtx->txbuf); |
| 123 | out_be16(&rtx->txbd.cbd_sc, 0); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 124 | |
| 125 | /* Set up the uart parameters in the parameter ram. */ |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 126 | out_be16(&up->smc_rbase, CPM_SERIAL_BASE); |
| 127 | out_be16(&up->smc_tbase, CPM_SERIAL_BASE + sizeof(cbd_t)); |
| 128 | out_8(&up->smc_rfcr, SMC_EB); |
| 129 | out_8(&up->smc_tfcr, SMC_EB); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 130 | |
| 131 | /* Set UART mode, 8 bit, no parity, one stop. |
| 132 | * Enable receive and transmit. |
| 133 | */ |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 134 | out_be16(&sp->smc_smcmr, smcr_mk_clen(9) | SMCMR_SM_UART); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 135 | |
| 136 | /* Mask all interrupts and remove anything pending. |
| 137 | */ |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 138 | out_8(&sp->smc_smcm, 0); |
| 139 | out_8(&sp->smc_smce, 0xff); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 140 | |
| 141 | /* Set up the baud rate generator */ |
Christophe Leroy | 48f896d | 2017-07-06 10:33:17 +0200 | [diff] [blame] | 142 | smc_setbrg(); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 143 | |
| 144 | /* Make the first buffer the only buffer. */ |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 145 | setbits_be16(&rtx->txbd.cbd_sc, BD_SC_WRAP); |
| 146 | setbits_be16(&rtx->rxbd.cbd_sc, BD_SC_EMPTY | BD_SC_WRAP); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 147 | |
| 148 | /* single/multi character receive. */ |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 149 | out_be16(&up->smc_mrblr, CONFIG_SYS_SMC_RXBUFLEN); |
| 150 | out_be16(&up->smc_maxidl, CONFIG_SYS_MAXIDLE); |
| 151 | out_be32(&rtx->rxindex, 0); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 152 | |
| 153 | /* Initialize Tx/Rx parameters. */ |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 154 | while (in_be16(&cp->cp_cpcr) & CPM_CR_FLG) /* wait if cp is busy */ |
| 155 | ; |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 156 | |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 157 | out_be16(&cp->cp_cpcr, |
| 158 | mk_cr_cmd(CPM_CR_CH_SMC, CPM_CR_INIT_TRX) | CPM_CR_FLG); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 159 | |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 160 | while (in_be16(&cp->cp_cpcr) & CPM_CR_FLG) /* wait if cp is busy */ |
| 161 | ; |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 162 | |
| 163 | /* Enable transmitter/receiver. */ |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 164 | setbits_be16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 165 | |
Christophe Leroy | 48f896d | 2017-07-06 10:33:17 +0200 | [diff] [blame] | 166 | return 0; |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 167 | } |
| 168 | |
Christophe Leroy | 48f896d | 2017-07-06 10:33:17 +0200 | [diff] [blame] | 169 | static void smc_putc(const char c) |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 170 | { |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 171 | immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR; |
| 172 | cpm8xx_t __iomem *cpmp = &(im->im_cpm); |
| 173 | struct serialbuffer __iomem *rtx; |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 174 | |
| 175 | if (c == '\n') |
Christophe Leroy | 48f896d | 2017-07-06 10:33:17 +0200 | [diff] [blame] | 176 | smc_putc('\r'); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 177 | |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 178 | rtx = (struct serialbuffer __iomem *)&cpmp->cp_dpmem[CPM_SERIAL_BASE]; |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 179 | |
| 180 | /* Wait for last character to go. */ |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 181 | out_8(&rtx->txbuf, c); |
| 182 | out_be16(&rtx->txbd.cbd_datlen, 1); |
| 183 | setbits_be16(&rtx->txbd.cbd_sc, BD_SC_READY); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 184 | |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 185 | while (in_be16(&rtx->txbd.cbd_sc) & BD_SC_READY) |
Christophe Leroy | 48f896d | 2017-07-06 10:33:17 +0200 | [diff] [blame] | 186 | WATCHDOG_RESET(); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 187 | } |
| 188 | |
Christophe Leroy | 48f896d | 2017-07-06 10:33:17 +0200 | [diff] [blame] | 189 | static void smc_puts(const char *s) |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 190 | { |
Christophe Leroy | 48f896d | 2017-07-06 10:33:17 +0200 | [diff] [blame] | 191 | while (*s) |
| 192 | smc_putc(*s++); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 193 | } |
| 194 | |
Christophe Leroy | 48f896d | 2017-07-06 10:33:17 +0200 | [diff] [blame] | 195 | static int smc_getc(void) |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 196 | { |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 197 | immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR; |
| 198 | cpm8xx_t __iomem *cpmp = &(im->im_cpm); |
| 199 | struct serialbuffer __iomem *rtx; |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 200 | unsigned char c; |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 201 | uint rxindex; |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 202 | |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 203 | rtx = (struct serialbuffer __iomem *)&cpmp->cp_dpmem[CPM_SERIAL_BASE]; |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 204 | |
| 205 | /* Wait for character to show up. */ |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 206 | while (in_be16(&rtx->rxbd.cbd_sc) & BD_SC_EMPTY) |
Christophe Leroy | 48f896d | 2017-07-06 10:33:17 +0200 | [diff] [blame] | 207 | WATCHDOG_RESET(); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 208 | |
| 209 | /* the characters are read one by one, |
| 210 | * use the rxindex to know the next char to deliver |
| 211 | */ |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 212 | rxindex = in_be32(&rtx->rxindex); |
| 213 | c = in_8(rtx->rxbuf + rxindex); |
| 214 | rxindex++; |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 215 | |
| 216 | /* check if all char are readout, then make prepare for next receive */ |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 217 | if (rxindex >= in_be16(&rtx->rxbd.cbd_datlen)) { |
| 218 | rxindex = 0; |
| 219 | setbits_be16(&rtx->rxbd.cbd_sc, BD_SC_EMPTY); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 220 | } |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 221 | out_be32(&rtx->rxindex, rxindex); |
Christophe Leroy | 48f896d | 2017-07-06 10:33:17 +0200 | [diff] [blame] | 222 | return c; |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 223 | } |
| 224 | |
Christophe Leroy | 48f896d | 2017-07-06 10:33:17 +0200 | [diff] [blame] | 225 | static int smc_tstc(void) |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 226 | { |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 227 | immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR; |
| 228 | cpm8xx_t __iomem *cpmp = &(im->im_cpm); |
| 229 | struct serialbuffer __iomem *rtx; |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 230 | |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 231 | rtx = (struct serialbuffer __iomem *)&cpmp->cp_dpmem[CPM_SERIAL_BASE]; |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 232 | |
Christophe Leroy | 394f9b3 | 2017-07-06 10:33:13 +0200 | [diff] [blame] | 233 | return !(in_be16(&rtx->rxbd.cbd_sc) & BD_SC_EMPTY); |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 234 | } |
| 235 | |
Christophe Leroy | 48f896d | 2017-07-06 10:33:17 +0200 | [diff] [blame] | 236 | struct serial_device serial_smc_device = { |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 237 | .name = "serial_smc", |
| 238 | .start = smc_init, |
| 239 | .stop = NULL, |
| 240 | .setbrg = smc_setbrg, |
| 241 | .getc = smc_getc, |
| 242 | .tstc = smc_tstc, |
| 243 | .putc = smc_putc, |
| 244 | .puts = smc_puts, |
| 245 | }; |
| 246 | |
| 247 | __weak struct serial_device *default_serial_console(void) |
| 248 | { |
| 249 | return &serial_smc_device; |
| 250 | } |
| 251 | |
| 252 | void mpc8xx_serial_initialize(void) |
| 253 | { |
| 254 | serial_register(&serial_smc_device); |
| 255 | } |