Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | |
| 3 | /* |
| 4 | * Menlosystems M53Menlo configuration |
| 5 | * Copyright (C) 2012-2017 Marek Vasut <marex@denx.de> |
| 6 | * Copyright (C) 2014-2017 Olaf Mandel <o.mandel@menlosystems.com> |
| 7 | */ |
| 8 | |
| 9 | #ifndef __M53MENLO_CONFIG_H__ |
| 10 | #define __M53MENLO_CONFIG_H__ |
| 11 | |
| 12 | #include <asm/arch/imx-regs.h> |
| 13 | |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 14 | /* |
| 15 | * Memory configurations |
| 16 | */ |
| 17 | #define PHYS_SDRAM_1 CSD0_BASE_ADDR |
| 18 | #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) |
| 19 | #define PHYS_SDRAM_2 CSD1_BASE_ADDR |
| 20 | #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) |
| 21 | #define PHYS_SDRAM_SIZE (gd->ram_size) |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 22 | |
Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 23 | #define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 24 | #define CFG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) |
| 25 | #define CFG_SYS_INIT_RAM_SIZE (IRAM_SIZE) |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 26 | |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 27 | /* |
| 28 | * U-Boot general configurations |
| 29 | */ |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 30 | |
| 31 | /* |
| 32 | * Serial Driver |
| 33 | */ |
Tom Rini | a17aa19 | 2022-12-04 10:04:55 -0500 | [diff] [blame] | 34 | #define CFG_MXC_UART_BASE UART1_BASE |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 35 | |
| 36 | /* |
| 37 | * MMC Driver |
| 38 | */ |
| 39 | #ifdef CONFIG_CMD_MMC |
Tom Rini | 376b88a | 2022-10-28 20:27:13 -0400 | [diff] [blame] | 40 | #define CFG_SYS_FSL_ESDHC_ADDR 0 |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 41 | #endif |
| 42 | |
| 43 | /* |
| 44 | * NAND |
| 45 | */ |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 46 | #ifdef CONFIG_CMD_NAND |
Tom Rini | b421349 | 2022-11-12 17:36:51 -0500 | [diff] [blame] | 47 | #define CFG_SYS_NAND_BASE NFC_BASE_ADDR_AXI |
Tom Rini | e57a31d | 2022-12-04 10:04:54 -0500 | [diff] [blame] | 48 | #define CFG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI |
Tom Rini | b22618f | 2022-12-04 10:04:53 -0500 | [diff] [blame] | 49 | #define CFG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR |
Tom Rini | b421349 | 2022-11-12 17:36:51 -0500 | [diff] [blame] | 50 | #define CFG_SYS_NAND_LARGEPAGE |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 51 | #endif |
| 52 | |
| 53 | /* |
| 54 | * Ethernet on SOC (FEC) |
| 55 | */ |
| 56 | #ifdef CONFIG_CMD_NET |
Tom Rini | 4e3c8a6 | 2022-12-04 10:03:53 -0500 | [diff] [blame] | 57 | #define CFG_FEC_MXC_PHYADDR 0x0 |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 58 | #endif |
| 59 | |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 60 | #define CFG_SYS_RTC_BUS_NUM 1 /* I2C2 */ |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 61 | |
| 62 | /* |
| 63 | * RTC |
| 64 | */ |
| 65 | #ifdef CONFIG_CMD_DATE |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 66 | #define CFG_SYS_I2C_RTC_ADDR 0x68 |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 67 | #endif |
| 68 | |
| 69 | /* |
| 70 | * USB |
| 71 | */ |
| 72 | #ifdef CONFIG_CMD_USB |
Tom Rini | b9796e8 | 2022-12-04 10:04:56 -0500 | [diff] [blame] | 73 | #define CFG_MXC_USB_PORT 1 |
| 74 | #define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) |
| 75 | #define CFG_MXC_USB_FLAGS 0 |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 76 | #endif |
| 77 | |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 78 | /* LVDS display */ |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 79 | #define CFG_SYS_LDB_CLOCK 33260000 |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 80 | |
Marek Vasut | 6b54674 | 2018-12-07 02:36:38 +0100 | [diff] [blame] | 81 | /* Watchdog */ |
Marek Vasut | 6b54674 | 2018-12-07 02:36:38 +0100 | [diff] [blame] | 82 | |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 83 | /* |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 84 | * Extra Environments |
| 85 | */ |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 86 | |
Tom Rini | c9edebe | 2022-12-04 10:03:50 -0500 | [diff] [blame] | 87 | #define CFG_EXTRA_ENV_SETTINGS \ |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 88 | "consdev=ttymxc0\0" \ |
| 89 | "baudrate=115200\0" \ |
| 90 | "bootscript=boot.scr\0" \ |
| 91 | "mmcdev=0\0" \ |
| 92 | "mmcpart=1\0" \ |
| 93 | "rootpath=/srv/\0" \ |
| 94 | "kernel_addr_r=0x72000000\0" \ |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 95 | "netdev=eth0\0" \ |
| 96 | "splashsource=mmc_fs\0" \ |
Olaf Mandel | 5cd4787 | 2018-12-12 13:42:00 +0000 | [diff] [blame] | 97 | "splashfile=boot/usplash.bmp.gz\0" \ |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 98 | "splashimage=0x88000000\0" \ |
| 99 | "splashpos=m,m\0" \ |
Marek Vasut | 4e89154 | 2021-09-12 00:40:00 +0200 | [diff] [blame] | 100 | "altbootcmd=" \ |
| 101 | "if test ${mmcpart} -eq 1 ; then " \ |
| 102 | "setenv mmcpart 2 ; " \ |
| 103 | "else " \ |
| 104 | "setenv mmcpart 1 ; " \ |
| 105 | "fi ; " \ |
| 106 | "boot\0" \ |
Marek Vasut | 29646a2 | 2019-06-09 18:46:46 +0200 | [diff] [blame] | 107 | "stdout=serial,vidconsole\0" \ |
| 108 | "stderr=serial,vidconsole\0" \ |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 109 | "addcons=" \ |
| 110 | "setenv bootargs ${bootargs} " \ |
| 111 | "console=${consdev},${baudrate}\0" \ |
| 112 | "addip=" \ |
| 113 | "setenv bootargs ${bootargs} " \ |
| 114 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ |
| 115 | ":${hostname}:${netdev}:off\0" \ |
Olaf Mandel | 242cfb5 | 2018-12-12 13:43:43 +0000 | [diff] [blame] | 116 | "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 117 | "addmisc=" \ |
| 118 | "setenv bootargs ${bootargs} ${miscargs}\0" \ |
| 119 | "addargs=run addcons addmisc addmtd\0" \ |
| 120 | "mmcload=" \ |
Marek Vasut | 4e89154 | 2021-09-12 00:40:00 +0200 | [diff] [blame] | 121 | "mmc rescan || reset ; load mmc ${mmcdev}:${mmcpart} " \ |
| 122 | "${kernel_addr_r} ${bootfile} || reset\0" \ |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 123 | "miscargs=nohlt panic=1\0" \ |
| 124 | "mmcargs=setenv bootargs root=/dev/mmcblk0p${mmcpart} rw " \ |
| 125 | "rootwait\0" \ |
| 126 | "mmc_mmc=" \ |
Marek Vasut | 4e89154 | 2021-09-12 00:40:00 +0200 | [diff] [blame] | 127 | "run mmcload mmcargs addargs || reset ; " \ |
| 128 | "bootm ${kernel_addr_r} ; reset\0" \ |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 129 | "netload=tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \ |
| 130 | "net_nfs=" \ |
| 131 | "run netload nfsargs addip addargs ; " \ |
| 132 | "bootm ${kernel_addr_r}\0" \ |
| 133 | "nfsargs=" \ |
| 134 | "setenv bootargs root=/dev/nfs rw " \ |
| 135 | "nfsroot=${serverip}:${rootpath}${hostname},v3,tcp\0" \ |
| 136 | "try_bootscript=" \ |
| 137 | "mmc rescan;" \ |
| 138 | "if test -e mmc 0:1 ${bootscript} ; then " \ |
| 139 | "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \ |
| 140 | "then ; " \ |
| 141 | "echo Running bootscript... ; " \ |
| 142 | "source ${kernel_addr_r} ; " \ |
| 143 | "fi ; " \ |
| 144 | "fi\0" |
| 145 | |
Marek Vasut | f90ff0b | 2018-10-04 21:24:14 +0200 | [diff] [blame] | 146 | #endif /* __M53MENLO_CONFIG_H__ */ |