| Paul Burton | 993ae66 | 2018-12-16 19:25:23 -0300 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * CI20 configuration |
| 4 | * |
| 5 | * Copyright (c) 2013 Imagination Technologies |
| 6 | * Author: Paul Burton <paul.burton@imgtec.com> |
| 7 | */ |
| 8 | |
| 9 | #ifndef __CONFIG_CI20_H__ |
| 10 | #define __CONFIG_CI20_H__ |
| 11 | |
| Paul Burton | 993ae66 | 2018-12-16 19:25:23 -0300 | [diff] [blame] | 12 | /* Memory configuration */ |
| Paul Burton | 993ae66 | 2018-12-16 19:25:23 -0300 | [diff] [blame] | 13 | |
| Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 14 | #define CFG_SYS_SDRAM_BASE 0x80000000 /* cached (KSEG0) address */ |
| Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 15 | #define CFG_SYS_INIT_SP_OFFSET 0x400000 |
| Paul Burton | 993ae66 | 2018-12-16 19:25:23 -0300 | [diff] [blame] | 16 | |
| Paul Burton | 993ae66 | 2018-12-16 19:25:23 -0300 | [diff] [blame] | 17 | /* NS16550-ish UARTs */ |
| Tom Rini | df6a215 | 2022-11-16 13:10:28 -0500 | [diff] [blame] | 18 | #define CFG_SYS_NS16550_CLK 48000000 |
| Paul Burton | 993ae66 | 2018-12-16 19:25:23 -0300 | [diff] [blame] | 19 | |
| Paul Burton | 993ae66 | 2018-12-16 19:25:23 -0300 | [diff] [blame] | 20 | #endif /* __CONFIG_CI20_H__ */ |