blob: afdb0f43cf0ddab5e62d307229adc3add7318f63 [file] [log] [blame]
Igor Opaniuk1ec7c002019-10-16 13:39:35 +03001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright 2019 Toradex AG
4 */
Igor Opaniukddfe8382019-10-16 13:39:36 +03005
Igor Opaniuk2ee70452020-07-15 13:31:00 +03006/ {
7 aliases {
8 u-boot,dm-pre-reloc;
9 mmc0 = &usdhc1;
10 usb0 = &usbotg1; /* required for ums */
11 display0 = &lcdif;
12 };
13};
14
Igor Opaniukddfe8382019-10-16 13:39:36 +030015&pinctrl_uart1 {
16 u-boot,dm-pre-reloc;
17};
18
19&pinctrl_uart1_ctrl1 {
20 u-boot,dm-pre-reloc;
Igor Opaniuk2ee70452020-07-15 13:31:00 +030021};
22
23&lcdif {
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_lcdif_dat
26 &pinctrl_lcdif_ctrl>;
27 status = "okay";
28 display = <&display0>;
29 u-boot,dm-pre-reloc;
30
31 display0: display0 {
32 bits-per-pixel = <18>;
33 bus-width = <24>;
34 status = "okay";
35
36 display-timings {
37 native-mode = <&timing_vga>;
38 timing_vga: 640x480 {
39 u-boot,dm-pre-reloc;
40 clock-frequency = <25175000>;
41 hactive = <640>;
42 vactive = <480>;
43 hback-porch = <40>;
44 hfront-porch = <24>;
45 vback-porch = <32>;
46 vfront-porch = <11>;
47 hsync-len = <96>;
48 vsync-len = <2>;
49
50 de-active = <1>;
51 hsync-active = <0>;
52 vsync-active = <0>;
53 pixelclk-active = <0>;
54 };
55 };
56 };
Igor Opaniukddfe8382019-10-16 13:39:36 +030057};