blob: 49938804611c9214661ae069423dc89028ee2213 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Ilya Ledvich791ca182013-11-07 07:57:33 +02002/*
3 * Copyright (c) 2004-2008 Texas Instruments
4 *
5 * (C) Copyright 2002
6 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
Ilya Ledvich791ca182013-11-07 07:57:33 +02007 */
8
9OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
10OUTPUT_ARCH(arm)
11ENTRY(_start)
12SECTIONS
13{
14 . = 0x00000000;
15
16 . = ALIGN(4);
17 .text :
18 {
19 *(.__image_copy_start)
Albert ARIBAUD9852cc62014-04-15 16:13:51 +020020 *(.vectors)
Ilya Ledvich791ca182013-11-07 07:57:33 +020021 CPUDIR/start.o (.text*)
Albert ARIBAUD1d17de62013-12-10 14:31:56 +010022 board/compulab/cm_t335/built-in.o (.text*)
Ilya Ledvich791ca182013-11-07 07:57:33 +020023 *(.text*)
24 }
25
26 . = ALIGN(4);
27 .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
28
29 . = ALIGN(4);
30 .data : {
31 *(.data*)
32 }
33
34 . = ALIGN(4);
35
36 . = .;
37
38 . = ALIGN(4);
Andrew Scull5a9095c2022-05-30 10:00:04 +000039 __u_boot_list : {
40 KEEP(*(SORT(__u_boot_list*)));
Ilya Ledvich791ca182013-11-07 07:57:33 +020041 }
42
43 . = ALIGN(4);
44
45 .image_copy_end :
46 {
47 *(.__image_copy_end)
48 }
49
50 .rel_dyn_start :
51 {
52 *(.__rel_dyn_start)
53 }
54
55 .rel.dyn : {
56 *(.rel*)
57 }
58
59 .rel_dyn_end :
60 {
61 *(.__rel_dyn_end)
62 }
63
Simon Glass1f577b92014-06-02 22:04:45 -060064 .hash : { *(.hash*) }
65
Albert ARIBAUD9d25fa42014-02-22 17:53:42 +010066 .end :
67 {
68 *(.__end)
69 }
70
71 _image_binary_end = .;
Ilya Ledvich791ca182013-11-07 07:57:33 +020072
73 /*
74 * Deprecated: this MMU section is used by pxa at present but
75 * should not be used by new boards/CPUs.
76 */
77 . = ALIGN(4096);
78 .mmutable : {
79 *(.mmutable)
80 }
81
82/*
83 * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
84 * __bss_base and __bss_limit are for linker only (overlay ordering)
85 */
86
87 .bss_start __rel_dyn_start (OVERLAY) : {
88 KEEP(*(.__bss_start));
89 __bss_base = .;
90 }
91
92 .bss __bss_base (OVERLAY) : {
93 *(.bss*)
94 . = ALIGN(4);
95 __bss_limit = .;
96 }
97
98 .bss_end __bss_limit (OVERLAY) : {
99 KEEP(*(.__bss_end));
100 }
101
Albert ARIBAUD9d25fa42014-02-22 17:53:42 +0100102 .dynsym _image_binary_end : { *(.dynsym) }
Albert ARIBAUDc6b3be62014-02-22 17:53:41 +0100103 .dynbss : { *(.dynbss) }
104 .dynstr : { *(.dynstr*) }
105 .dynamic : { *(.dynamic*) }
106 .plt : { *(.plt*) }
107 .interp : { *(.interp*) }
108 .gnu : { *(.gnu*) }
109 .ARM.exidx : { *(.ARM.exidx*) }
Ilya Ledvich791ca182013-11-07 07:57:33 +0200110}