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Chander Kashyap0d2f2772013-08-21 10:38:56 +05301/*
2 * Copyright (C) 2013 Samsung Electronics
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
Inderpal Singh3260bc82014-01-08 09:19:57 +05308#include <usb.h>
Simon Glass37f11622014-10-20 19:48:37 -06009#include <asm/gpio.h>
Chander Kashyap0d2f2772013-08-21 10:38:56 +053010#include <asm/arch/pinmux.h>
Inderpal Singh04bb7372013-08-21 10:38:57 +053011#include <asm/arch/dwmmc.h>
Chander Kashyap0d2f2772013-08-21 10:38:56 +053012#include <asm/arch/power.h>
13
14DECLARE_GLOBAL_DATA_PTR;
15
Inderpal Singh3260bc82014-01-08 09:19:57 +053016#ifdef CONFIG_USB_EHCI_EXYNOS
17int board_usb_init(int index, enum usb_init_type init)
18{
Inderpal Singh3260bc82014-01-08 09:19:57 +053019 /* Configure gpios for usb 3503 hub:
20 * disconnect, toggle reset and connect
21 */
Simon Glass4f83d3d2014-10-20 19:48:39 -060022 gpio_request(EXYNOS5_GPIO_D17, "usb_connect");
23 gpio_request(EXYNOS5_GPIO_X35, "usb_reset");
Akshay Saraswat1376cdd2014-05-13 10:30:14 +053024 gpio_direction_output(EXYNOS5_GPIO_D17, 0);
25 gpio_direction_output(EXYNOS5_GPIO_X35, 0);
Inderpal Singh3260bc82014-01-08 09:19:57 +053026
Akshay Saraswat1376cdd2014-05-13 10:30:14 +053027 gpio_direction_output(EXYNOS5_GPIO_X35, 1);
28 gpio_direction_output(EXYNOS5_GPIO_D17, 1);
Inderpal Singh3260bc82014-01-08 09:19:57 +053029
30 return 0;
31}
32#endif
33
Chander Kashyap0d2f2772013-08-21 10:38:56 +053034int board_init(void)
35{
36 gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
37 return 0;
38}
39
40int dram_init(void)
41{
42 int i;
43 u32 addr;
44
45 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
46 addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
47 gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
48 }
49 return 0;
50}
51
52int power_init_board(void)
53{
54 set_ps_hold_ctrl();
55 return 0;
56}
57
58void dram_init_banksize(void)
59{
60 int i;
61 u32 addr, size;
62
63 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
64 addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
65 size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
66
67 gd->bd->bi_dram[i].start = addr;
68 gd->bd->bi_dram[i].size = size;
69 }
70}
71
Inderpal Singh04bb7372013-08-21 10:38:57 +053072#ifdef CONFIG_GENERIC_MMC
73int board_mmc_init(bd_t *bis)
74{
75 int ret;
76 /* dwmmc initializattion for available channels */
77 ret = exynos_dwmmc_init(gd->fdt_blob);
78 if (ret)
79 debug("dwmmc init failed\n");
80
81 return ret;
82}
83#endif
84
Chander Kashyap0d2f2772013-08-21 10:38:56 +053085static int board_uart_init(void)
86{
87 int err = 0, uart_id;
88
89 for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
90 err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
91 if (err) {
92 debug("UART%d not configured\n",
93 (uart_id - PERIPH_ID_UART0));
94 return err;
95 }
96 }
97 return err;
98}
99
100#ifdef CONFIG_BOARD_EARLY_INIT_F
101int board_early_init_f(void)
102{
103 int err;
104
105 err = board_uart_init();
106 if (err) {
107 debug("UART init failed\n");
108 return err;
109 }
110 return err;
111}
112#endif
113
114#ifdef CONFIG_DISPLAY_BOARDINFO
115int checkboard(void)
116{
117 printf("\nBoard: Arndale\n");
118
119 return 0;
120}
121#endif
Andre Przywara64d4c222014-08-01 13:35:44 +0200122
123#ifdef CONFIG_S5P_PA_SYSRAM
124void smp_set_core_boot_addr(unsigned long addr, int corenr)
125{
126 writel(addr, CONFIG_S5P_PA_SYSRAM);
127
128 /* make sure this write is really executed */
129 __asm__ volatile ("dsb\n");
130}
131#endif