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Igor Prusov072c98b2023-09-25 18:52:09 +03001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2018 - AmLogic, Inc.
4 * Copyright 2023 (C) SberDevices, Inc.
5 */
6
7#ifndef _ARCH_MESON_CLOCK_A1_H_
8#define _ARCH_MESON_CLOCK_A1_H_
9
10/*
11 * Clock controller register offsets
12 */
13#define A1_SYS_OSCIN_CTRL 0x0
14#define A1_SYS_CLK_CTRL0 0x10
15#define A1_SYS_CLK_EN0 0x1c
16#define A1_SAR_ADC_CLK_CTR 0xc0
17#define A1_SPIFC_CLK_CTRL 0xd8
18#define A1_USB_BUSCLK_CTRL 0xdc
19#define A1_SD_EMMC_CLK_CTRL 0xe0
20
21#define A1_ANACTRL_FIXPLL_CTRL0 0x0
22
23#endif /* _ARCH_MESON_CLOCK_A1_H_ */