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Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +09001/*
2 * Configuation settings for the sh7753evb board
3 *
4 * Copyright (C) 2012 Renesas Solutions Corp.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __SH7753EVB_H
10#define __SH7753EVB_H
11
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090012#define CONFIG_CPU_SH7753 1
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090013
Vladimir Zapolskiy5e72b842016-11-28 00:15:30 +020014#define CONFIG_DISPLAY_BOARDINFO
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090015#undef CONFIG_SHOW_BOOT_PROGRESS
16#define CONFIG_CMDLINE_EDITING
17#define CONFIG_AUTO_COMPLETE
18
19/* MEMORY */
20#define SH7753EVB_SDRAM_BASE (0x40000000)
21#define SH7753EVB_SDRAM_SIZE (512 * 1024 * 1024)
22
23#define CONFIG_SYS_LONGHELP
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090024#define CONFIG_SYS_PBSIZE 256
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090025#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
26
27/* SCIF */
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090028#define CONFIG_CONS_SCIF2 1
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090029
30#define CONFIG_SYS_MEMTEST_START (SH7753EVB_SDRAM_BASE)
31#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
32 480 * 1024 * 1024)
33#undef CONFIG_SYS_ALT_MEMTEST
34#undef CONFIG_SYS_MEMTEST_SCRATCH
35#undef CONFIG_SYS_LOADS_BAUD_CHANGE
36
37#define CONFIG_SYS_SDRAM_BASE (SH7753EVB_SDRAM_BASE)
38#define CONFIG_SYS_SDRAM_SIZE (SH7753EVB_SDRAM_SIZE)
39#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \
40 128 * 1024 * 1024)
41
42#define CONFIG_SYS_MONITOR_BASE 0x00000000
43#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
44#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
45#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
46
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090047/* Ether */
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090048#define CONFIG_SH_ETHER_USE_PORT 0
49#define CONFIG_SH_ETHER_PHY_ADDR 18
50#define CONFIG_SH_ETHER_CACHE_WRITEBACK 1
51#define CONFIG_SH_ETHER_USE_GETHER 1
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090052#define CONFIG_BITBANGMII
53#define CONFIG_BITBANGMII_MULTI
54#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
55#define CONFIG_PHY_VITESSE
56
57#define SH7753EVB_ETHERNET_MAC_BASE_SPI 0x00090000
58#define SH7753EVB_SPI_SECTOR_SIZE (64 * 1024)
59#define SH7753EVB_ETHERNET_MAC_BASE SH7753EVB_ETHERNET_MAC_BASE_SPI
60#define SH7753EVB_ETHERNET_MAC_SIZE 17
61#define SH7753EVB_ETHERNET_NUM_CH 2
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090062
63/* SPI */
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090064#define CONFIG_SH_SPI_BASE 0xfe002000
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090065
66/* MMCIF */
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090067#define CONFIG_SH_MMCIF 1
68#define CONFIG_SH_MMCIF_ADDR 0xffcb0000
69#define CONFIG_SH_MMCIF_CLK 48000000
70
71/* ENV setting */
72#define CONFIG_ENV_IS_EMBEDDED
Yoshihiro Shimoda95abe5f2013-12-18 16:03:44 +090073#define CONFIG_ENV_SECT_SIZE (64 * 1024)
74#define CONFIG_ENV_ADDR (0x00080000)
75#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
76#define CONFIG_ENV_OVERWRITE 1
77#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
78#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
79#define CONFIG_EXTRA_ENV_SETTINGS \
80 "netboot=bootp; bootm\0"
81
82/* Board Clock */
83#define CONFIG_SYS_CLK_FREQ 48000000
84#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
85#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
86#define CONFIG_SYS_TMU_CLK_DIV 4
87#endif /* __SH7753EVB_H */