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Wolfgang Denk97caf672006-03-12 02:12:27 +01001/*
2 * U-boot - io.h IO routines
3 *
Aubrey Li314d22f2007-04-05 18:31:18 +08004 * Copyright (c) 2005-2007 Analog Devices Inc.
Wolfgang Denk97caf672006-03-12 02:12:27 +01005 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
Aubrey Li314d22f2007-04-05 18:31:18 +080021 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22 * MA 02110-1301 USA
Wolfgang Denk97caf672006-03-12 02:12:27 +010023 */
24
25#ifndef _BLACKFIN_IO_H
26#define _BLACKFIN_IO_H
27
Wolfgang Denk97caf672006-03-12 02:12:27 +010028#ifdef __KERNEL__
29
30#include <linux/config.h>
31
32/* function prototypes for CF support */
33extern void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words);
34extern void cf_insw(unsigned short *sect_buf, unsigned short *addr, int words);
35extern unsigned char cf_inb(volatile unsigned char *addr);
Aubrey.Li9da597f2007-03-09 13:38:44 +080036extern void cf_outb(unsigned char val, volatile unsigned char *addr);
37
38static inline void sync(void)
39{
Aubrey Li1ac50af2007-04-05 18:29:55 +080040 __builtin_bfin_ssync();
Aubrey.Li9da597f2007-03-09 13:38:44 +080041}
Wolfgang Denk97caf672006-03-12 02:12:27 +010042
43/*
Haavard Skinnemoenf9855512007-12-13 12:56:33 +010044 * Given a physical address and a length, return a virtual address
45 * that can be used to access the memory range with the caching
46 * properties specified by "flags".
47 */
48typedef unsigned long phys_addr_t;
49
50#define MAP_NOCACHE (0)
51#define MAP_WRCOMBINE (0)
52#define MAP_WRBACK (0)
53#define MAP_WRTHROUGH (0)
54
55static inline void *
56map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
57{
58 return (void *)paddr;
59}
60
61/*
62 * Take down a mapping set up by map_physmem().
63 */
64static inline void unmap_physmem(void *vaddr, unsigned long flags)
65{
66
67}
68
69/*
Wolfgang Denk97caf672006-03-12 02:12:27 +010070 * These are for ISA/PCI shared memory _only_ and should never be used
71 * on any other type of memory, including Zorro memory. They are meant to
72 * access the bus in the bus byte order which is little-endian!.
73 *
74 * readX/writeX() are used to access memory mapped devices. On some
75 * architectures the memory mapped IO stuff needs to be accessed
76 * differently. On the m68k architecture, we just read/write the
77 * memory location directly.
78 */
79
Wolfgang Denk97caf672006-03-12 02:12:27 +010080#define readb(addr) ({ unsigned char __v = (*(volatile unsigned char *) (addr));asm("ssync;"); __v; })
81#define readw(addr) ({ unsigned short __v = (*(volatile unsigned short *) (addr)); asm("ssync;");__v; })
82#define readl(addr) ({ unsigned int __v = (*(volatile unsigned int *) (addr));asm("ssync;"); __v; })
83
84#define writeb(b,addr) {((*(volatile unsigned char *) (addr)) = (b)); asm("ssync;");}
85#define writew(b,addr) {((*(volatile unsigned short *) (addr)) = (b)); asm("ssync;");}
86#define writel(b,addr) {((*(volatile unsigned int *) (addr)) = (b)); asm("ssync;");}
87
88#define memset_io(a,b,c) memset((void *)(a),(b),(c))
89#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
90#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
91
92#define inb_p(addr) readb((addr) + BF533_PCIIO_BASE)
93#define inb(addr) cf_inb((volatile unsigned char*)(addr))
94
95#define outb(x,addr) cf_outb((unsigned char)(x), (volatile unsigned char*)(addr))
96#define outb_p(x,addr) outb(x, (addr) + BF533_PCIIO_BASE)
97
98#define inw(addr) readw((addr) + BF533_PCIIO_BASE)
99#define inl(addr) readl((addr) + BF533_PCIIO_BASE)
100
101#define outw(x,addr) writew(x, (addr) + BF533_PCIIO_BASE)
102#define outl(x,addr) writel(x, (addr) + BF533_PCIIO_BASE)
103
104#define insb(port, addr, count) memcpy((void*)addr, (void*)(BF533_PCIIO_BASE + port), count)
105#define insw(port, addr, count) cf_insw((unsigned short*)addr, (unsigned short*)(port), (count))
106#define insl(port, addr, count) memcpy((void*)addr, (void*)(BF533_PCIIO_BASE + port), (4*count))
107
108#define outsb(port,addr,count) memcpy((void*)(BF533_PCIIO_BASE + port), (void*)addr, count)
109#define outsw(port,addr,count) cf_outsw((unsigned short*)(port), (unsigned short*)addr, (count))
110#define outsl(port,addr,count) memcpy((void*)(BF533_PCIIO_BASE + port), (void*)addr, (4*count))
111
112#define IO_SPACE_LIMIT 0xffff
113
114/* Values for nocacheflag and cmode */
115#define IOMAP_FULL_CACHING 0
116#define IOMAP_NOCACHE_SER 1
117#define IOMAP_NOCACHE_NONSER 2
118#define IOMAP_WRITETHROUGH 3
119
120extern void *__ioremap(unsigned long physaddr, unsigned long size,
121 int cacheflag);
122extern void __iounmap(void *addr, unsigned long size);
123
124extern inline void *ioremap(unsigned long physaddr, unsigned long size)
125{
126 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
127}
Aubrey.Li9da597f2007-03-09 13:38:44 +0800128extern inline void *ioremap_nocache(unsigned long physaddr, unsigned long size)
Wolfgang Denk97caf672006-03-12 02:12:27 +0100129{
130 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
131}
132extern inline void *ioremap_writethrough(unsigned long physaddr,
133 unsigned long size)
134{
135 return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
136}
137extern inline void *ioremap_fullcache(unsigned long physaddr,
138 unsigned long size)
139{
140 return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
141}
142
143extern void iounmap(void *addr);
144
145extern void blkfin_inv_cache_all(void);
146#define dma_cache_inv(_start,_size) do { blkfin_inv_cache_all();} while (0)
147#define dma_cache_wback(_start,_size) do { } while (0)
148#define dma_cache_wback_inv(_start,_size) do { blkfin_inv_cache_all();} while (0)
149
150#endif
151#endif