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Simon Glass582ba6e2019-12-06 21:42:58 -07001/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright 2019 Google LLC
4 */
5
6#ifndef _ASM_ARCH_UART_H
7#define _ASM_ARCH_UART_H
8
Simon Glass298530a2020-12-19 10:40:05 -07009#include <ns16550.h>
10
11/**
12 * struct apl_ns16550_plat - platform data for the APL UART
13 *
14 * Note that when of-platdata is in use, apl_ns16550_of_to_plat() actually
15 * copies the ns16550_plat contents to the start of this struct, meaning that
16 * dtplat is no-longer valid. This is done so that the ns16550 driver can use
17 * dev_get_plat() without any offsets or adjustments.
18 */
19struct apl_ns16550_plat {
20#if CONFIG_IS_ENABLED(OF_PLATDATA)
21 struct dtd_intel_apl_ns16550 dtplat;
22#endif
23 struct ns16550_plat ns16550;
24};
25
Simon Glass582ba6e2019-12-06 21:42:58 -070026/**
27 * apl_uart_init() - Set up the APL UART device and clock
28 *
29 * This enables the PCI device, sets up the MMIO region and turns on the clock
30 * using LPSS.
31 *
32 * The UART won't actually work unless the GPIO settings are correct and the
33 * signals actually exit the SoC. See board_debug_uart_init() for that.
34 */
Simon Glass298530a2020-12-19 10:40:05 -070035void apl_uart_init(pci_dev_t bdf, ulong base);
Simon Glass582ba6e2019-12-06 21:42:58 -070036
37#endif