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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Marek Vasutc140e982011-11-08 23:18:08 +00002/*
3 * Freescale i.MX28 timer driver
4 *
5 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
6 * on behalf of DENX Software Engineering GmbH
7 *
8 * Based on code from LTIB:
9 * (C) Copyright 2009-2010 Freescale Semiconductor, Inc.
Marek Vasutc140e982011-11-08 23:18:08 +000010 */
11
12#include <common.h>
Simon Glass97589732020-05-10 11:40:02 -060013#include <init.h>
Simon Glass495a5dc2019-11-14 12:57:30 -070014#include <time.h>
Marek Vasutc140e982011-11-08 23:18:08 +000015#include <asm/io.h>
16#include <asm/arch/imx-regs.h>
17#include <asm/arch/sys_proto.h>
Simon Glassdbd79542020-05-10 11:40:11 -060018#include <linux/delay.h>
Marek Vasutc140e982011-11-08 23:18:08 +000019
20/* Maximum fixed count */
Fadil Berishad608f6e2013-02-27 17:00:07 +000021#if defined(CONFIG_MX23)
22#define TIMER_LOAD_VAL 0xffff
23#elif defined(CONFIG_MX28)
24#define TIMER_LOAD_VAL 0xffffffff
25#endif
Marek Vasutc140e982011-11-08 23:18:08 +000026
27DECLARE_GLOBAL_DATA_PTR;
28
Simon Glass2655ee12012-12-13 20:48:34 +000029#define timestamp (gd->arch.tbl)
Simon Glassa848da52012-12-13 20:48:35 +000030#define lastdec (gd->arch.lastinc)
Marek Vasutc140e982011-11-08 23:18:08 +000031
32/*
33 * This driver uses 1kHz clock source.
34 */
Fadil Berisha69d8ce02013-02-28 10:03:26 -050035#define MXS_INCREMENTER_HZ 1000
Marek Vasutc140e982011-11-08 23:18:08 +000036
37static inline unsigned long tick_to_time(unsigned long tick)
38{
Fadil Berisha69d8ce02013-02-28 10:03:26 -050039 return tick / (MXS_INCREMENTER_HZ / CONFIG_SYS_HZ);
Marek Vasutc140e982011-11-08 23:18:08 +000040}
41
42static inline unsigned long time_to_tick(unsigned long time)
43{
Fadil Berisha69d8ce02013-02-28 10:03:26 -050044 return time * (MXS_INCREMENTER_HZ / CONFIG_SYS_HZ);
Marek Vasutc140e982011-11-08 23:18:08 +000045}
46
47/* Calculate how many ticks happen in "us" microseconds */
48static inline unsigned long us_to_tick(unsigned long us)
49{
Fadil Berisha69d8ce02013-02-28 10:03:26 -050050 return (us * MXS_INCREMENTER_HZ) / 1000000;
Marek Vasutc140e982011-11-08 23:18:08 +000051}
52
53int timer_init(void)
54{
Otavio Salvador22f4ff92012-08-05 09:05:31 +000055 struct mxs_timrot_regs *timrot_regs =
56 (struct mxs_timrot_regs *)MXS_TIMROT_BASE;
Marek Vasutc140e982011-11-08 23:18:08 +000057
58 /* Reset Timers and Rotary Encoder module */
Otavio Salvadorcbf0bf22012-08-13 09:53:12 +000059 mxs_reset_block(&timrot_regs->hw_timrot_rotctrl_reg);
Marek Vasutc140e982011-11-08 23:18:08 +000060
61 /* Set fixed_count to 0 */
Fadil Berishad608f6e2013-02-27 17:00:07 +000062#if defined(CONFIG_MX23)
63 writel(0, &timrot_regs->hw_timrot_timcount0);
64#elif defined(CONFIG_MX28)
Marek Vasutc140e982011-11-08 23:18:08 +000065 writel(0, &timrot_regs->hw_timrot_fixed_count0);
Fadil Berishad608f6e2013-02-27 17:00:07 +000066#endif
Marek Vasutc140e982011-11-08 23:18:08 +000067
68 /* Set UPDATE bit and 1Khz frequency */
69 writel(TIMROT_TIMCTRLn_UPDATE | TIMROT_TIMCTRLn_RELOAD |
70 TIMROT_TIMCTRLn_SELECT_1KHZ_XTAL,
71 &timrot_regs->hw_timrot_timctrl0);
72
73 /* Set fixed_count to maximal value */
Fadil Berishad608f6e2013-02-27 17:00:07 +000074#if defined(CONFIG_MX23)
75 writel(TIMER_LOAD_VAL - 1, &timrot_regs->hw_timrot_timcount0);
76#elif defined(CONFIG_MX28)
Marek Vasutc140e982011-11-08 23:18:08 +000077 writel(TIMER_LOAD_VAL, &timrot_regs->hw_timrot_fixed_count0);
Fadil Berishad608f6e2013-02-27 17:00:07 +000078#endif
Marek Vasutc140e982011-11-08 23:18:08 +000079
80 return 0;
81}
82
Marek Vasutc142b672012-02-07 06:47:31 +000083unsigned long long get_ticks(void)
Marek Vasutc140e982011-11-08 23:18:08 +000084{
Otavio Salvador22f4ff92012-08-05 09:05:31 +000085 struct mxs_timrot_regs *timrot_regs =
86 (struct mxs_timrot_regs *)MXS_TIMROT_BASE;
Fadil Berishad608f6e2013-02-27 17:00:07 +000087 uint32_t now;
Marek Vasutc140e982011-11-08 23:18:08 +000088
89 /* Current tick value */
Fadil Berishad608f6e2013-02-27 17:00:07 +000090#if defined(CONFIG_MX23)
91 /* Upper bits are the valid ones. */
92 now = readl(&timrot_regs->hw_timrot_timcount0) >>
93 TIMROT_RUNNING_COUNTn_RUNNING_COUNT_OFFSET;
94#elif defined(CONFIG_MX28)
95 now = readl(&timrot_regs->hw_timrot_running_count0);
Wolfgang Denk1fc42342014-11-06 14:03:04 +010096#else
97#error "Don't know how to read timrot_regs"
Fadil Berishad608f6e2013-02-27 17:00:07 +000098#endif
Marek Vasutc140e982011-11-08 23:18:08 +000099
100 if (lastdec >= now) {
101 /*
102 * normal mode (non roll)
103 * move stamp forward with absolut diff ticks
104 */
105 timestamp += (lastdec - now);
106 } else {
107 /* we have rollover of decrementer */
108 timestamp += (TIMER_LOAD_VAL - now) + lastdec;
109
110 }
111 lastdec = now;
112
Marek Vasutc142b672012-02-07 06:47:31 +0000113 return timestamp;
114}
115
Marek Vasutc142b672012-02-07 06:47:31 +0000116ulong get_timer(ulong base)
117{
Patrick Delaunay9858a602018-10-05 11:33:52 +0200118 return tick_to_time(get_ticks()) - base;
Marek Vasutc142b672012-02-07 06:47:31 +0000119}
120
Marek Vasutc140e982011-11-08 23:18:08 +0000121/* We use the HW_DIGCTL_MICROSECONDS register for sub-millisecond timer. */
Fadil Berisha69d8ce02013-02-28 10:03:26 -0500122#define MXS_HW_DIGCTL_MICROSECONDS 0x8001c0c0
Marek Vasutc140e982011-11-08 23:18:08 +0000123
124void __udelay(unsigned long usec)
125{
126 uint32_t old, new, incr;
127 uint32_t counter = 0;
128
Fadil Berisha69d8ce02013-02-28 10:03:26 -0500129 old = readl(MXS_HW_DIGCTL_MICROSECONDS);
Marek Vasutc140e982011-11-08 23:18:08 +0000130
131 while (counter < usec) {
Fadil Berisha69d8ce02013-02-28 10:03:26 -0500132 new = readl(MXS_HW_DIGCTL_MICROSECONDS);
Marek Vasutc140e982011-11-08 23:18:08 +0000133
134 /* Check if the timer wrapped. */
135 if (new < old) {
136 incr = 0xffffffff - old;
137 incr += new;
138 } else {
139 incr = new - old;
140 }
141
142 /*
143 * Check if we are close to the maximum time and the counter
144 * would wrap if incremented. If that's the case, break out
145 * from the loop as the requested delay time passed.
146 */
147 if (counter + incr < counter)
148 break;
149
150 counter += incr;
151 old = new;
152 }
153}
Marek Vasutc142b672012-02-07 06:47:31 +0000154
155ulong get_tbclk(void)
156{
Fadil Berisha69d8ce02013-02-28 10:03:26 -0500157 return MXS_INCREMENTER_HZ;
Marek Vasutc142b672012-02-07 06:47:31 +0000158}